Sony STR-DN850 Service Manual page 113

Multi channel av receiver
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Pin No.
Pin Name
70
WDTRSTO
71
NC
72
VDD_EXT
73
SL/SR_OUT
74
SL/SR_IN
75
BCLK_IN
OPTION_L/
76
OPTION_R_OUT
77
FRONTHI_L/R_OUT
78
VDD_INT
79 to 83
NC
84
VDD_EXT
85
VDD_INT
86
L/R_OUT
87
MID/SW2_OUT
88
SBL/SBR_OUT
89
ZONE_L/R
90
VDD_INT
91
VDD_EXT
92
MCLK_IN
93
VDD_INT
94
C/SW1_OUT
95
C/SW_IN
96
A/D_2CH
97
LRCLK_IN
98
BCLK_OUT
99
LRCLK_OUT
100
L/R_IN
101
SBL/SBR_IN
102
VDD_INT
103
DIR_IN
104
VDD_EXT
105
VDD_INT
106
BOOT_CFG2
107
VDD_INT
108
AMI_ACK
109
GND
110
THD_M
111
THD_P
112
VDD_EXT
113, 114
VDD_INT
115
MS1
116
VDD_INT
117
WDT_CLKO
118
WDT_CLKIN
119
VDD_EXT
120 to
ADDR23 to ADDR21
122
123
VDD_INT
124, 125
ADDR20, ADDR19
126
VDD_EXT
127, 128
ADDR16, ADDR15
129
VDD_INT
130
ADDR14
131
AMI_WR
132
AMI_RD
I/O
O
Watchdog timer reset output terminal
-
Not used
-
Power supply terminal (+3.3V) (for I/O)
O
Audio signal output to the DSP2
I
Audio signal input terminal
I
Bit clock signal input terminal
O
Audio signal output to the DSP2
O
Audio signal output to the DSP2
-
Power supply terminal (+1.2V) (for core)
-
Not used
-
Power supply terminal (+3.3V) (for I/O)
-
Power supply terminal (+1.2V) (for core)
O
Audio signal output to the DSP2
O
Audio signal output terminal
O
Audio signal output to the DSP2
O
Not used
-
Power supply terminal (+1.2V) (for core)
-
Power supply terminal (+3.3V) (for I/O)
I
Master clock signal input from the frequency multiplier
-
Power supply terminal (+1.2V) (for core)
O
Audio signal output to the DSP2
I
Audio signal input terminal
I
Audio signal input terminal
I
L/R sampling clock signal input terminal
O
Bit clock signal output to the DSP2
O
L/R sampling clock signal output to the DSP2
I
Audio signal input terminal
I
Audio signal input terminal
-
Power supply terminal (+1.2V) (for core)
I
Audio signal input terminal
-
Power supply terminal (+3.3V) (for I/O)
-
Power supply terminal (+1.2V) (for core)
I
Boot mode selection signal input terminal
-
Power supply terminal (+1.2V) (for core)
I
Memory acknowledge terminal
-
Ground terminal
O
Thermal diode cathode output terminal
I
Thermal diode anode input terminal
-
Power supply terminal (+3.3V) (for I/O)
-
Power supply terminal (+1.2V) (for core)
O
Memory select terminal
-
Power supply terminal (+1.2V) (for core)
O
Watchdog resonator pad output terminal
I
Watchdog timer clock input terminal
-
Power supply terminal (+3.3V) (for I/O)
O
Address signal output terminal Not used
-
Power supply terminal (+1.2V) (for core)
O
Address signal output terminal
-
Power supply terminal (+3.3V) (for I/O)
O
Address signal output terminal
-
Power supply terminal (+1.2V) (for core)
O
Address signal output terminal
O
AMI port write enable terminal
O
AMI port read enable terminal
Description
Not used
Not used
Fixed at "L" in this unit
Not used
Not used
Not used
Not used
Not used
Fixed at "L" in this unit
Not used
Not used
Not used
Not used
Not used
STR-DN860/DN1060
113

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