Sony STR-DN850 Service Manual page 112

STR-DN860/DN1060
MB-1409 BOARD (14/18)
Pin No. Pin Name
1 SDDQM
2 MS0
3 SDCKE
4 VDD_INT
5 CLK_CFG1
6 ADDR0
7 BOOT_CFG0
8 VDD_EXT
9 to 13 ADDR1 to ADDR5
14 BOOT_CFG1
15 GND
16, 17 ADDR6, ADDR7
18, 19 NC
20, 21 ADDR8, ADDR9
22 CLK_CFG0
23 VDD_INT
24 CLKIN
25 XTAL2
26 ADDR10
27 SDA10
28 VDD_EXT
29 VDD_INT
30 ADDR11
31 ADDR12
32 ADDR17
33 ADDR13
34 VDD_INT
35 ADDR18
RESETOUT/
36
RUNRSTIN
37 VDD_INT
38 MOSI
39 MISO
40 SPICLK
41 VDD_INT
42 DPI_P05
43 DSP_CS
44 MD
45 VDD_EXT
46 NC
47 RESET_MAIN
48 VDD_INT
49 UART_OUT
50 UART_IN
51 LED
52 to 56 NC
57 VDD_EXT
58 to 61 NC
62 VDD_INT
63, 64 NC
65 VDD_INT
66, 67 NC
68 VDD_INT
69 NC
112
IC6501 ADSST-AVR-3046 (DSP)
I/O
O Data mask signal output to the SD-RAM
O Memory select signal output to the SD-RAM
O Clock enable signal output to the SD-RAM
- Power supply terminal (+1.2V) (for core)
I
Clock frequency setting terminal
O
Address signal output to the SD-RAM
I Boot mode selection signal input terminal
-
Power supply terminal (+3.3V) (for I/O)
O
Address signal output to the SD-RAM
I Serial data input from the main system controller
- Ground terminal
O
Address signal output to the SD-RAM
-
Not used
O Address signal output to the SD-RAM
I Clock frequency setting terminal
- Power supply terminal (+1.2V) (for core)
I System clock input terminal (25 MHz)
O System clock output terminal
O Address signal output terminal
O Address signal output to the SD-RAM
- Power supply terminal (+3.3V) (for I/O)
- Power supply terminal (+1.2V) (for core)
O Address signal output to the SD-RAM
O Address signal output terminal
O Bank address signal output to the SD-RAM
O Address signal output terminal
- Power supply terminal (+1.2V) (for core)
O
Bank address signal output to the SD-RAM
I/O
Reset signal output terminal/Running reset signal input terminal
- Power supply terminal (+1.2V) (for core)
I Serial data input from the main system controller
O
Serial data output to the main system controller
I
Serial data transfer clock signal input from the main system controller
- Power supply terminal (+1.2V) (for core)
I Chip select signal input from the main system controller
I Chip select signal input from the main system controller
- Not used
- Power supply terminal (+3.3V) (for I/O)
- Not used
I
Reset signal input terminal
-
Power supply terminal (+1.2V) (for core)
O Serial data output terminal
I
Serial data input terminal
O
Not used
- Not used
- Power supply terminal (+3.3V) (for I/O)
- Not used
- Power supply terminal (+1.2V) (for core)
- Not used
- Power supply terminal (+1.2V) (for core)
- Not used
-
Power supply terminal (+1.2V) (for core)
-
Not used
Description
Fixed at "L" in this unit
Fixed at "H" in this unit
Fixed at "L" in this unit
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used