Chipset - Asus TW510-E2 Service Manual

Dual amd opteron pedestal/5u rackmount server
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ECC Redirection [Disabled]
ECC Redirection [Disabled]
ECC Redirection [Disabled]
ECC Redirection [Disabled]
ECC Redirection [Disabled]
When set to [Enabled], correctable errors are corrected as the data is
passed to the requestor. The data in the DRAM is not corrected if this item
is set to [Disabled]. Configuration options: [Disabled] [Enabled]
DRAM Background Scrubber [Disabled]
DRAM Background Scrubber [Disabled]
DRAM Background Scrubber [Disabled]
DRAM Background Scrubber [Disabled]
DRAM Background Scrubber [Disabled]
Specifies the scrub rate of the next address to be scrubbed by the DRAM
scrubber. Configuration options: [Disabled] [40.0ns]
L2 Cache Background Scrubber [Disabled]
L2 Cache Background Scrubber [Disabled]
L2 Cache Background Scrubber [Disabled]
L2 Cache Background Scrubber [Disabled]
L2 Cache Background Scrubber [Disabled]
Specifies the scrub rate of the next address to be scrubbed by the L2
cache scrubber. Configuration options: [Disabled] [40.0ns]
DCache Background Scrubber [Disabled]
DCache Background Scrubber [Disabled]
DCache Background Scrubber [Disabled]
DCache Background Scrubber [Disabled]
DCache Background Scrubber [Disabled]
Specifies the scrub rate of the next address to be scrubbed by the data
cache scrubber. Configuration options: [Disabled] [40.0ns]
5.4.3
5.4.3
5.4.3
5.4.3
5.4.3

Chipset

Chipset
Chipset
Chipset
Chipset
This menu shows the chipset configuration settings. Select an item then
press <Enter> to display a pop-up menu with the configuration options.
Advanced
OnChip IDE Channel0
OnChip IDE Channel1
Hyper Transport Frequency
Hyper Transport Width
Errata 94 Enhanced
System BIOS Cacheable
Spread Spectrum
SATA Spread Spectrum
PCIE Spread Spectrum
SSE/SSE2 Instructions
Init Display First
IDE DMA Transfer Access
Serial-ATA 1
SATA DMA Transfer
Serial-ATA 2
SATA2 DMA Transfer
IDE Prefetch Mode
F1:Help
ESC: Exit
OnChip IDE Channel0 [Enabled]
OnChip IDE Channel0 [Enabled]
OnChip IDE Channel0 [Enabled]
OnChip IDE Channel0 [Enabled]
OnChip IDE Channel0 [Enabled]
Enables or disables the on-chip IDE channel 0. Configuration options:
[Disabled] [Enabled]
OnChip IDE Channel1 [Enabled]
OnChip IDE Channel1 [Enabled]
OnChip IDE Channel1 [Enabled]
OnChip IDE Channel1 [Enabled]
OnChip IDE Channel1 [Enabled]
Enables or disables the on-chip IDE channel 1. Configuration options:
[Disabled] [Enabled]
5 - 2 4
5 - 2 4
5 - 2 4
5 - 2 4
5 - 2 4
Phoenix-Award BIOS CMOS Setup Utility
Chipset
[↓ ↓ ↓ ↓ ↓ 16 ↑ ↑ ↑ ↑ ↑ 16]
↑↓ : Select Item
↑↓
↑↓
↑↓
↑↓
→←: Select Menu
→←
→←
→←
→←
Enter: Select Sub-menu
[Enabled]
[Enabled]
[4x]
[Auto]
[Disabled]
[Enabled]
[Disabled]
[Disabled]
[Enabled]
[PCI Slot]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
-/+: Change Value
C h a p t e r 5 : B I O S s e t u p
C h a p t e r 5 : B I O S s e t u p
C h a p t e r 5 : B I O S s e t u p
C h a p t e r 5 : B I O S s e t u p
C h a p t e r 5 : B I O S s e t u p
Select Menu
Item Specific Help
Disable/Enable OnChip IDE
Channel0.
F5: Setup Defaults
F10: Save and Exit

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