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1.3 TECHNOLOGY
CONTENTS
SWITCHING
System switching is accomplished by means of a custom IC "engine" that provides 256
switchable digital channels. When expanded to a two cabinet system the matrix is ex-
panded to 512 digital channels. The engine is controlled by its own 16 bit Motorola MC
68302 microprocessor and switching control program. The 68302 microprocessor is spe-
cifically designed for communication systems. Each of the 512 digital channels is auto-
matically assigned to carry voice or data as required by system operation in a PCM for-
mat.
In addition, the system also utilizes Digital Signal Processors (DSPs). Each DSP may be
configured by the switching control program as a DTMF receiver or as a C.O. tone detec-
tor on a per-call basis. Each engine chip contains four DSP channels. One engine chip is
located on the central processor card. Additional DSP's can be easily added using plug-
on daughterboards. This means that a system can contain a total of 68 DSP channels
when fully expanded. These 68 DSP channels are fully shared throughout the system as
a common resource. Additionally, 24 dedicated CID DSPs can be added to support the
Caller ID feature. These 24 dedicated DSPs are fully shared throughout the system. Con-
sult your Technical Manual–Installation Section for provisioning details.
MEMORY
The DCS 400si system is a Stored Program Control (SPC) multiprocessor system. The
main system program and operating system (OS) are stored in four EPROM (Erasable
Programmable Read Only Memory) chips totaling 2,048 kilobytes of memory. These four
EPROMs plug into sockets on the DROMD daughterboard which plugs onto the DCCP
(main processor) board.
Please see section
2.6, DROMD Daughterboard, for more de-
tails.
The customer database and main processor scratch pad memory are contained in 2 Mbytes
of SRAM (Static Random Access Memory) which is located on the main DCCP board. In
case of a power outage the SRAM is protected by an onboard lithium battery for up to
2,000 hours.
An optional DCDM (DCS 400si Customer Data Module) daughterboard can be plugged
onto the DCCP that provides an additional 2 Mbytes of "Super Capacitor" backed SRAM
memory. This SRAM memory is an auxiliary customer database storage location that can
be used to store a copy of the customer's most recent system database. The super ca-
pacitor will maintain the DCDM memory up to 150 hours in case of a power outage. Please
see section 2.6
for more detailed information on the DCDM.
MICROPROCESSORS
The DCS 400si uses distributed processing. Its primary (CCP) processor is a 16 bit Motorola
MC68302 operating at a clock speed of 16 MHz. This processor provides local control of
the 256 PCM channels in a single cabinet system. In an expanded system, an additional
1.4
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