SOYO SY-K7V DRAGON User Manual page 77

BIOS Setup Utility
CPU & PCI Bus Control
Setting
PCI Master 0 Disabled
WS Write
Enabled
PCI Post Disabled
Write
Enabled
Disabled
PCI Delay
Enabled
Transaction
Description
When Enabled, writes to the PCI
bus are executed with zero wait
states.
This item allows you to
enabled/disabled the PCI post write. Default
The chipset has an embedded 32-bit
posted write buffer to support delay
transactions cycles. Select Enabled
to support compliance with PCI
specification version 2.1.
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SY-K7V DRAGON
Note
Default
Default