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4.3. Memory Mapped Addressing
When the CompactFlash Memory Card registers are accessed via memory references, the registers appear in the
common memory space window: 0-2K bytes as shown in Table 4-4.
-REG
A10
A9-A4
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
1
X
1
1
X
NOTES: 1. Register 0 is accessed with -CE1 low and -CE2 low as a word register on the combined Odd Data Bus and Even Data
Bus (D15-D0). This register may also be accessed by a pair of byte accesses to the offset 0 with -CE1 low and -CE2
high. Note that the address space of this word register overlaps the address space of the Error and Feature byte-wide
registers that lie at offset 1. When accessed twice as byte register with -CE1 low, the first byte to be accessed is the
even byte of the word and the second byte accessed is the odd byte of the equivalent word access.
A byte access to address 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write) register.
2. Registers at offset 8, 9 and D are non-overlapping duplicates of the registers at offset 0 and 1.
Register 8 is equivalent to register 0, while register 9 accesses the odd byte. Therefore, if the registers are byte accessed
in the order 9 then 8 the data will be transferred odd byte then even byte.
Repeated byte accesses to register 8 or 0 will access consecutive (even then odd) bytes from the data buffer. Repeated
word accesses to register 8, 9 or 0 will access consecutive words from the data buffer. Repeated byte accesses to
register 9 are not supported. However, repeated alternating byte accesses to registers 8 then 9 will access consecutive
(even then odd) bytes from the data buffer. Byte accesses to register 9 access only the odd byte of the data.
3. Accesses to even addresses between 400h and 7FFh access register 8. Accesses to odd addresses between 400h and
7FFh access register 9. This 1 KByte memory window to the data register is provided so that hosts c an perform
memory to memory block moves to the data register when the register lies in memory space.
Some hosts, such as the X86 processors, must increment both the source and destination addresses when executing the
memory to memory block move instruction. Some PCMCIA socket adapters also have auto incrementing address logic
embedded within them. This address window allows these hosts and adapters to function efficiently.
Note that this entire window accesses the Data Register FIFO and does not allow ran dom access to the data buffer
within the CompactFlash Memory Card.
®
CompactFlash
Memory Card Product Manual, Rev. 10.0 © 2002 SANDISK CORPORATION
Table 4-4. Memory Mapped Decoding
A3
A2
A1
A0
Offset
0
0
0
0
0
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
0
1
0
0
4
0
1
0
1
5
0
1
1
0
6
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
1
1
0
1
D
1
1
1
0
E
1
1
1
1
F
X
X
X
0
8
X
X
X
1
9
ATA Drive Register Set Definition and Protocol
-OE=0
-WE=0
Even RD Data
Even WR Data
Error
Features
Sector Count
Sector Count
Sector No.
Sector No.
Cylinder Low
Cylinder Low
Cylinder High
Cylinder High
Select Card/Head
Select Card/Head
Status
Command
Dup. Even RD Data
Dup. Even WR Data
Dup. Odd RD Data
Dup. Odd WR Data
Dup. Error
Dup. Features
Alt Status
Device Ctl
Drive Address
Reserved
Even RD Data
Even WR Data
Odd RD Data
Odd WR Data
Notes
1
2
2
2
2
3
3
4-3
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