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3.2. Electrical Description
The CompactFlash Memory Card Series is optimized for operation with hosts, which support the PCMCIA I/O
interface standard conforming to the PC Card ATA specification. However, the CompactFlash Card may also be
configured to operate in systems that support only the memory interface standard. The configuration of the
CompactFlash Card will be controlled using the standard PCMCIA configuration registers starting at address 200h
in the Attribute Memory space of the CompactFlash Memory Card.
Table 3-2 describes the I/O signals. Signals whose source is the host are designated as inputs while signals that the
CompactFlash Memory Card sources are outputs. The CompactFlash Card logic levels conform to those specified in
the PCMCIA Release 2.1 Specification. See Section 3.3 for definitions of Input and Output type.
Signal Name
Dir.
A10—A0
(PC Card Memory Mode)
A10—A0
(PC Card I/O Mode)
A2—A0
(True IDE Mode)
A10—A3
(True IDE Mode)
BVD1
I/O
(PC Card Memory Mode)
-STSCHG
(PC Card I/O Mode)
Status Changed
-PDIAG
(True IDE Mode)
I/O
BVD2
(PC Card Memory Mode)
-SPKR
(PC Card I/O Mode)
-DASP
(True IDE Mode)
-CD1, -CD2
O
(PC Card Memory Mode)
-CD1, -CD2
(PC Card I/O Mode)
-CD1, -CD2
(True IDE Mode)
®
CompactFlash
Memory Card Product Manual, Rev. 10.0 © 2002 SANDISK CORPORATION
Table 3-2. Signal Description
Pin
I
8, 10, 11, 12, 14,
These address lines along with the -REG signal are used to select the following: The
15, 16, 17, 18,
I/O port address registers within the CompactFlash Card, the memory mapped port
19, 20
address registers within the card, a byte in the card's information structure and its
configuration control and status registers.
This signal is the same as the PC Card Memory Mode signal.
I
18, 19, 20
In True IDE Mode only A[2:0] is used to select the one o f eight registers in the Task
File.
In True IDE Mode these remaining address lines should be grounded by the host.
46
This signal is asserted high as the BVD1 signal since a battery is not used with this
product.
This signal is asserted low to alert the host to changes in the RDY/ -BSY and Write
Protect states, while the I/O interface is configured. Its use is controlled by the Card
Config and Status Register.
In the True IDE Mode, this input/output is the Pass Diagnostic signal in the
Master/Slave handshake protocol.
45
This output line is always driven to a high state in Memory Mode since a battery is not
required for this product.
This output line is always driven to a high state in I/O Mode since this product does
not support the audio function.
In the True IDE Mode, this input/output is the Disk Active/Slave Present signal in the
Master/Slave handshake protocol.
26, 25
These Card Detect pins are connected to ground on the CompactFlash Card. They
are used by the host to determine if the card is fully inserted into its socket.
This signal is the same for all modes.
This signal is the same for all modes.
CompactFlash Memory Card Interface Description
Description
3-3
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