External Pac I"9 - HP 98640A Installation And Reference Manual

7-channel analog input interface
Table of Contents

Advertisement

98640A Analog Input Interface
where period was in seconds and the
round
function rounds to the nearest least significant bit (Isb). If
you are taking a series of readings and want to specify a pace interval before each reading, the timing
of the write to the pace register is critical; it should come as soon as the busy bit goes low, and the
analog read request should follow it immediately. This will allow you to maintain accurate pacing,
and it will execute fast enough to keep up with the free run speed of the A-to-D card. Note that at
high speeds there will not be enough time to calculate pace values or register addresses; you should
precOInpute these values and store them in arrays for fast access.
For more information on the workings of internal pacing, refer to Section 3 of this manual.
Noise
You can mInImIze the effects of noise by averaging several readings from the same channel.
Averaging is a crude filter of both random and periodic voltage fluctuations.
NOTE
The design of the A-to-D card permits a first order rol-
loff (6 db per octave) to begin when the signal on an in-
put exceeds 55khz.
At low sample rates an error may occur if the sample rate is equal to, or nearly equal to, a periodic
noise on an input. Under this condition, you may be measuring an alias of the periodic signal with the
voltage you intended to measure superimposed on it. You may be able to detect this by comparing
readings taken from the same channel at high and low sample rates over equal amounts of time. If
your high speed samples found voltages that are higher or lower than you found with your low speed
samples, you may have a problem with an alias. Increase the number of samples of the channel.
The paragraphs above are not a complete discussion of measurement techniques. They are intended to
start you in the right direction in the design of your program.
EXTERNAL PACING
You might use external pacing for ADC readings if:
-- you want to use a pace interval longer than that allowed by the pacing timer
~O.0393390
second)
-- you want the readings to be controlled by an external event, rather than by time
External pacing is primarily a hardware operation.
It
is largely controlled by two hardware control
lines on the wire termination assembly, IPACDA (internal pace disable, terminal 29) and EPCON (ex-
ternal pace control, terminal 30). There's not a lot of software involvement, other than making the
read requests that you would normally make for an internally paced read. The timing of the execu-
tion of those read requests is controlled by the hardware. (There's no way to control IP ACDA and
EPCON directly from software; you'll have to build your own circuits to control them.)
In the next several paragraphs we will look at some of the features of the hardware that affect exter-
nal pacing, and then we will see how they work in external pacing applications. You may want to
refer to Section 3 of this manual for more information on the internal workings of the hardware.
4-10

Advertisement

Table of Contents
loading

Table of Contents