Intel D815EEA Product Manual page 71

Desktop board
Hide thumbs Also See for D815EEA:
Table of Contents

Advertisement

Table 29.
I/O Map (continued)
Address (hex)
Size
03F0 - 03F5
6 bytes
03F6
1 byte
03F8 - 03FF
8 bytes
04D0 - 04D1
2 bytes
One of these ranges:
8 bytes
0530 - 0537
0E80 - 0E87
0F40 - 0F47
LPTn + 400h
8 bytes
0CF8 - 0CFB**
4 bytes
0CF9***
1 byte
0CFC - 0CFF
4 bytes
FFA0 - FFA7
8 bytes
FFA8 - FFAF
8 bytes
96 contiguous bytes
ICH (ACPI + TCO)
starting on a 128-byte
divisible boundary
64 contiguous bytes
D815EEA desktop board resource
starting on a 64-byte
divisible boundary
64 contiguous bytes
Onboard audio controller
starting on a 64-byte
divisible boundary
32 contiguous bytes
ICH2 (USB#1)
starting on a 32-byte
divisible boundary
32 contiguous bytes
ICH2 (USB#2)
starting on a 32-byte
divisible boundary
16 contiguous bytes
ICH2 (SMBus)
starting on a 16-byte
divisible boundary
64 contiguous bytes
ICH2 modem controller
starting on a 64-byte
divisible boundary
32 contiguous bytes
ICH2 audio mixer
starting on a 32-byte
divisible boundary
64 contiguous bytes
ICH2 LAN controller
starting on a 64-byte
divisible boundary
4096 contiguous bytes
Intel 82801BA PCI bridge
starting on a
4096-byte divisible
boundary
*
Default, but can be changed to another address range.
**
Dword access only.
***
Byte access only.
Description
Diskette channel 1
Primary IDE channel command port
COM1
Edge / level triggered PIC
Windows Sound System
ECP port, LPTn base address + 400h
PCI configuration address register
Turbo and reset control register
PCI configuration data register
Primary bus master IDE registers
Secondary bus master IDE registers
Technical Reference
71

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents