Sony UWP-V1 Service Manual page 141

Circuit Description
UTX-P1 (MB-1094 board)
UTX-P1 consists of the following four blocks.
1. Audio circuit and the peripheral circuit:
Ref No. 1 through 90 series
2. PLL block and RF block:
Ref No. 100 series
3. CPU and the peripheral circuit:
Ref No. 400 series
4. Power supply block: Ref No. 200 series and 300 series.
1. Audio circuit and the peripheral circuit
The audio input signal to the AF INPUT connector (CN1)
is sent to the MIC/LINE selection switch (SW1) in the
unbalanced signal format. When the MIC/LINE switch
(S1) is set to the "MIC" input, 0 dB attenuation is imposed
on the audio input signal, and when the MIC/LINE switch
(S1) is set to the "LINE" input, 49 dB attenuation is
imposed on the audio input signal, and the audio signal is
sent to the audio attenuator (ATT) circuit. The ATT is set
(0 to 21 dB with 3 dB step) by the resistance value that is
selected by the analog switch (IC1). As the analog switch
receives the 3-bit ATT control signal (ATT0, 1, 2) from
CPU (IC405), it selects the resistance value accordingly.
The ATT control signal data is determined by the informa-
tion generated by the [+] and [_] switches (S403, S402)
that send the control data to the CPU (IC405).
The audio signal that is adjusted of its level by the ATT
circuit is buffered (Q1) and sent to the limiter circuit (IC2-
1/2). The limiter circuit monitors the audio input signal
level if the input signal level is excessive or not, and
controls the input signal level so as not to exceed the set
threshold level. The limiter output signal is passed through
a low-pass filter (IC2-2/2), is amplified (IC4-2/2) and sent
to the compressor circuit (IC6). The audio signal receives
the signal compression at the compressor circuit with the
compression ratio of 2 :1 (compressed to 1/2), and is sent
to the pre-emphasis circuit. Time constant of the pre-
emphasis circuit is 50 us. The audio signal is then mixed
with the tone signal (X101: 32.000 kHz), is passed through
the AF switch (Q103) and is sent to the RF circuit block
(VCO: CP101). The AF level detection circuit (IC4-1/2,
D3) is used to display the audio signal on the LCD
(LCD401) and LED (D401).
2. PLL block and RF block
The oscillator circuit is a PLL-frequency synthesizer type
oscillator. VCO (CP101) is a voltage-controlled oscillator
working as a transmission frequency oscillator and modu-
UWP Series
lator. The transmission frequency is controlled by the serial
data (PLL data) that is supplied from the CPU (IC405) to
the PLL IC (IC102) having the built-in pre-scalar.
The signal that is amplified by the RF amplifier (Q106,
Q108) is passed through a low-pass filter (L110 to L112,
C142, C143) and is output from the XLR JACK (CN999)
via the isolator (CP102) and matching circuit (C146, C147
and L114). At this time, the locked status of the PLL can
be detected by monitoring the LD terminal (pin-10) of the
PLL IC (IC102). The voltage control circuit (Q104, Q105)
has the function of switching ON/OFF the power voltage
to the RF circuit. The control signal to the voltage control
circuit is the RFM signal that is supplied from the CPU
(IC405). (Power is supplied to the RF circuit when the
RFM signal is "L".)
3. CPU and the peripheral circuit
The CPU (IC405) is an 8-bit microprocessor operating on
the 4 MHz (X401) clock frequency.
The CPU (IC405) performs the functions of sending out
the PLL data, ATT (attenuation), AF muting, RF muting,
LCD control and others by accessing the EEPROM
(IC401). The voltage detection circuit (IC402) detected the
power supply voltage (+2.7 V) and uses it for resetting the
CPU (IC405).
4. Power supply block
The DC-DC converter block (IC201, Q201, D201) gener-
ates +5 V (VCC1) from the battery voltage (3 V), and
supplies it to the audio block and RF block. The regulator
circuit (IC211) generates +3.3 V (VCC2) from the +5 V
(VCC1), and supplies it to the CPU block and PLL block.
The POWER switch circuit (POWER switch: S301, Q301
to Q303) is the control circuit that turns ON/OFF the DC-
DC converter.
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UTX-P1 UTX-P1
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