Processor Function Overview - Intel S2600CO series User Manual

Intel® Server Board S2600CO Family TPS
Error
®
Processor Intel
QuickPath
Interconnect link
frequencies not
identical
Processor microcode
update missing
Processor microcode
update failed
3.2

Processor Function Overview

With the release of the Intel
key system components, including the CPU, Integrated Memory Controller (IMC), and
Integrated IO Module (IIO), have been combined into a single processor package and feature
per socket; two Intel
to 40 lanes of Gen 3 PCI Express* links capable of 8.0 GT/s, and 4 lanes of DMI2/PCI Express*
Gen 2 interface with a peak transfer rate of 5.0 GT/s. The processor supports up to 46 bits of
physical address space and 48-bit of virtual address space.
The following sections will provide an overview of the key processor features and functions that
help to define the architecture, performance and supported functionality of the server board. For
more comprehensive processor specific information, refer to the Intel
2600 or E5-2600 v2 product family documents listed in the
Revision 1.4
Severity
Fatal The BIOS detects the QPI link frequencies and responds as follows:
 Adjusts all QPI interconnect link frequencies to highest common
frequency.
 No error is generated – this is not an error condition.
 Continues to boot the system successfully.
If the link frequencies for all QPI links cannot be adjusted to be the same,
then this is an error, and the BIOS responds as follows:
 Logs the POST Error Code into the SEL.
 Alerts the BMC to set the System Status LED to steady Amber.
 Displays "0195: Processor Intel
synchronize" message in the Error Manager.
 Does not disable the processor.
 Takes Fatal Error action (see above) and will not boot until the fault
condition is remedied.
Minor The BIOS detects the error condition and responds as follows:
 Logs the POST Error Code into the SEL.
 Displays "818x: Processor 0x microcode update not found" message in
the Error Manager or on the screen.
 The system continues to boot in a degraded state, regardless of the
setting of POST Error Pause in the Setup.
Major The BIOS detects the error condition and responds as follows:
 Logs the POST Error Code into the SEL.
 Displays "816x: Processor 0x unable to apply microcode update"
message in the Error Manager or on the screen.
Takes Major Error action. The system may continue to boot in a degraded
state, depending on the setting of POST Error Pause in Setup, or may halt
with the POST Error Code in the Error Manager waiting for operator
intervention.
® ®
Xeon processor E5-2600 or E5-2600 v2 product family, several
®
QuickPath Interconnect point to point links capable of up to 8.0 GT/s, up
Intel order number G42278-004
Functional Architecture Overview
System Action
®
QPI link frequencies unable to
® ®
Xeon processor E5-
Reference Documents list.
19