Table of Contents
Advertisement
Signal Descriptions
Table 5-11. PM3 Interconnect Signals (Continued)
PIN
MOTHERBOARD
SIGNAL
12
GND
13
14
PC8
15
PA11
16
GND
17
PA10
18
GND
19
20
PC7
21
PA9
22
GND
23
PA8
24
GND
25
26
PC13
27
ETHTCK
28
GND
29
ETHRCK
30
GND
31
32
USBSPD
33
PB31
34
BINPAK
35
PB30
36
GND
37
PB29
5-24
DAUGHTERBOARD
INPUT/
SIGNAL
OUTPUT
GND
PC8
PA11
GND
PA10
GND
PC7
PA9
GND
PA8
GND
PC13
ETHTCK
GND
ETHRCK
GND
—
PB31
BINPAK
PB30
GND
PB29
MPC821FADS-DB USER'S MANUAL
DESCRIPTION
—
I/O, X
Port C Bit 8. Also appears at P8, but is
otherwise unused.
I/O, X
Port A Bit 11. Also appears at P8, but is
otherwise unused.
—
I/O, X
Port A Bit 10. Also appears at P8, but is
otherwise unused.
—
I/O, X
Port C Bit 7. Also appears at P8, but is
otherwise unused.
I/O, X
Port A Bit 9. Also appears at P8, but is
otherwise unused.
—
I/O, X
Port A Bit 8. Also appears at P8, but is
otherwise unused.
—
I/O, X
Port C Bit 13. Also appears at P8, but is
otherwise unused.
O, X
Ethernet Port Transmit Clock signal. When the
Ethernet port is disabled via the BCSR1, this
signal is three-stated. Also appears at P8.
—
O, X
Ethernet Port Receive Clock signal. When the
Ethernet port is disabled via the BCSR1 , this
signal is three-stated. Also appears at P8.
—
O, X
Unused on this board.
I/O, X
Port B Bit 31. Also appears at P8, but is
otherwise unused.
I/O
PCMCIA Port Input Port Acknowledge signal.
PC15/DREQ1/RTS1/L1ST1 on the MPC821.
When the PCMCIA port is disabled via the
BCSR1, this signal can be used off-board for
another function.
I/O, X
Port B Bit 30. Also appears at P8, but is
otherwise unused.
—
I/O, X
Port B Bit 29. Also appears at P8, but is
otherwise unused.
MOTOROLA
Advertisement
Table of Contents
