Motorola MPC821FADS User Manual page 29

Table 5-9. PM1 Interconnect Signals (Continued)
PIN MOTHERBOARD
SIGNAL
69 BS3A
70 GND
71 A31
72 GND
73 BS1A
74 GND
75 TSIZ1
76 GND
77 REG_A
78 GND
79 A30
80 GND
81 A21
82 GND
83 A20
84 GND
85 A7
86 GND
87 A15
88 GND
89 A14
90 GND
91 A13
92 GND
93 A6
94 GND
95 A12
96 GND
97 A11
98 GND
MOTOROLA
DAUGHTERBOARD INPUT/
SIGNAL OUTPUT
BS3A
GND
A31
GND
BS1A
GND
TSIZ1
GND
REG_A I, TS, L
GND
A30
GND
A21
GND
A20
GND
A7
GND
A15
GND
A14
GND
A13
GND
A6
GND
A12
GND
A11
GND
MPC821FADS-DB USER'S MANUAL
DESCRIPTION
I, L Byte Select 3 signal from UPMA. Selects offset
three bytes within a word. Used as one of the
CAS lines for DRAM access.
—
I, TS Address line 31
—
I, L Byte Select 1 signal from UPMA. Selects offset
one byte within a word. Used as one of the
CAS lines for DRAM access.
—
X, TS Transfer Size 1 signal. Used in conjunction with
TSIZ0 to indicate the number of bytes
remaining in an operand transfer. Not used on
this board.
—
Register Select Port A signal. TSIZ0/REG on
the MPC821. Used with the PCMCIA port to
select attribute memory or I/O space.
—
I, TS Address line 30
—
I, TS Address line 21
—
I, TS Address line 20
—
I, TS Address line 7
—
I, TS Address line 15
—
I, TS Address line 14
—
I, TS Address line 13
—
I, TS Address line 6
—
I, TS Address line 12
—
I, TS Address line 11
—
Signal Descriptions
5-15