General-Purpose Input/Output (Gpio) - Input Timing; General-Purpose Output Timing; Gpio Input Qualifier - Example Diagram For Qualprd = 1; General-Purpose Input Timing Requirements - Texas Instruments SM320F2812-HT Data Manual

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XCLKOUT
GPIO
6.18 General-Purpose Input/Output (GPIO) – Input Timing
GPIO
Signal
1 1
SYSCLKOUT
Output From
Qualifier
NOTES: A. This glitch is ignored by the input qualifier. The QUALPRD bit field specifies the qualification sampling period. It can vary from 00
to 0xFF. Input qualification is not applicable when QUALPRD = 00. For any other value n, the qualification sampling period in 2n
SYSCLKOUT cycles (i.e., at every 2n SYSCLKOUT cycle, the GPIO pin is sampled). Six consecutive samples must be of the
same value for a given input to be recognized.
B. For the qualifier to detect the change, the input should be stable for 10 SYSCLKOUT cycles or greater. In other words, the inputs
should be stable for (5 x QUALPRD x 2) SYSCLKOUT cycles. This would ensure six sampling windows for detection to occur.
Since external signals are driven asynchronously, an 11-SYSCLKOUT-wide pulse ensures reliable recognition.
Figure 6-22. GPIO Input Qualifier – Example Diagram for QUALPRD = 1
t Pulse duration, GPIO low/high
w(GPI)
(1) Not production tested.
(2) Input Qualification Time (IQT) = [5 × QUALPRD × 2] × t
Copyright © 2009–2011, Texas Instruments Incorporated
t
d(XCOH-GPO)
t
f(GPO)
Figure 6-21. General-Purpose Output Timing
0 0 0 0 0 0
Sampling Window
QUALPRD = 1 (2 x SYSCLKOUT cycles) x 5
Table 6-20. General-Purpose Input Timing Requirements
All GPIOs
c(SCO)
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See Note A
0 1 0 0 0 1
QUALPRD
With no qualifier
With qualifier
SM320F2812-HT
SM320F2812-HT
SGUS062B – JUNE 2009 – REVISED JUNE 2011
t
r(GPO)
1 1 1 1 1 1
(1)
MIN MAX
2 × t
c(SCO)
(2)
1 × t + IQT
c(SCO)
Electrical Specifications
1 1
UNIT
cycles
107