Figure 2-32. Data Flow Diagram - Epson ActionLaser 1300 EPL-3000 Service Manual

Print data and commands transmitted from the host computer via parallel or optional interfaces are
read using the interrupt process of the CPU and are stored in the DRAM input buffer.
Data and commands in the input buffer are processed by the CPU, which then stores the printing
bit-map data (image data) in the V-RAM (Video RAM) (image buffer) in the DRAM. The size of the
V-RAM depends on the available DRAM size and can be specified using printer settings. A page
error occurs when the V-RAM is so small that the CPU cannot process data faster than it is
transmitted to the engine controller board. If such an error occurs, increase the V-RAM using
printer settings.
The CPU transmits image data stored in the V-RAM to a temporary buffer in the SRAM, which is
located in an address space different from the CPU.
equivalent to several lines. This is controlled by the ASIC, which synchronizes and transmits the
CPU
68000
Development
I
Rev. A
-
Host Computer
I
Parallel IIF Circuit
E05B01 (IC9)
I
E05A83 (IC5)
DRAM Parallel/Serial
Converter
Control
Circuit
Temporary Buffer
,
I
: VRAM
Input Buffer : page buffer)

Figure 2-32. Data Flow Diagram

Operating Principles
The temporary buffer has a capacity
I
I
I
I
System
Area
Toner Save
Engine
Controller
Circuit
2-21