Interrupts - Intel BLKD865PERL Technical Product Specification

Intel Desktop Board D865PERL Technical Product Specification

2.6 Interrupts

The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the
Advanced Programmable Interrupt Controller (APIC) portion of the ICH5 component. The PIC is
supported in Windows 98 SE and Windows ME, and uses the first 16 interrupts. The APIC is
supported in Windows 2000 and Windows XP, and supports a total of 24 interrupts.
Table 17.

Interrupts

IRQ System Resource
NMI I/O channel check
0 Reserved, interval timer
1 Reserved, keyboard buffer full
2 Reserved, cascade interrupt from slave PIC
3 COM2
4 COM1
5 LPT2 (Plug and Play option)/User available
6 Diskette drive
7 LPT1
8 Real-time clock
9 Reserved for ICH5 system management bus
10 User available
11 User available
12 Onboard mouse port (if present, else user available)
13 Reserved, math coprocessor
14 Primary IDE/Serial ATA (if present, else user available)
15 Secondary IDE/Serial ATA (if present, else user available)
(Note 2)
16 USB UHCI controller 1 and USB UHCI controller 4 (through PIRQA)
(Note 2)
17 AC '97 audio/modem/User available (through PIRQB)
(Note 2)
18 ICH5 USB controller 3 (through PIRQC)
(Note 2)
19 ICH5 USB controller 2 (through PIRQD)
(Note 2)
20 ICH5 LAN (through PIRQE)
(Note 2)
21 User available (through PIRQF)
(Note 2)
22 User available (through PIRQG)
(Note 2)
23 ICH5 USB 2.0 EHCI controller/User available (through PIRQH)
Notes:
1. Default, but can be changed to another IRQ.
2. Available in APIC mode only.
56
(Note 1)
(Note 1)
(Note 1)