Intel CORE 2 DUO E4000 - DATASHEET 3-2008 Datasheet page 5

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Figures
1
V
Static and Transient Tolerance ............................................................................. 23
2
V
Overshoot Example Waveform ............................................................................. 24
3
Differential Clock Waveform ...................................................................................... 31
4
Differential Clock Crosspoint Specification ................................................................... 31
5
Differential Measurements......................................................................................... 31
6
Differential Clock Crosspoint Specification ................................................................... 32
7
Processor Package Assembly Sketch ........................................................................... 35
8
Processor Package Drawing Sheet 1 of 3 ..................................................................... 36
9
Processor Package Drawing Sheet 2 of 3 ..................................................................... 37
10
Processor Package Drawing Sheet 3 of 3 ..................................................................... 38
11
Processor E6000 Series with 4 MB L2 Cache with 1333 MHz FSB..................................... 40
12
13
Processor Top-Side Markings Example for the Intel
Processors E6000 Series with 2 MB L2 Cache ............................................................... 41
14
Processor Top-Side Markings Example for the Intel
Processors E4000 Series with 2 MB L2 Cache ............................................................... 42
15
Processor Top-Side Markings for the Intel
16
Processor Land Coordinates and Quadrants (Top View) ................................................. 43
17
land-out Diagram (Top View - Left Side) ..................................................................... 46
18
land-out Diagram (Top View - Right Side) ................................................................... 47
19
Thermal Profile 1 ..................................................................................................... 79
20
Thermal Profile 2 ..................................................................................................... 80
21
Thermal Profile 3 ..................................................................................................... 81
22
Thermal Profile 4 ..................................................................................................... 82
23
Thermal Profile 5 ..................................................................................................... 83
24
Case Temperature (TC) Measurement Location ............................................................ 84
25
Thermal Monitor 2 Frequency and Voltage Ordering ...................................................... 86
26
Processor PECI Topology ........................................................................................... 90
27
Conceptual Fan Control on PECI-Based Platforms ......................................................... 91
28
Conceptual Fan Control on Thermal Diode-Based Platforms............................................ 91
29
Processor Low Power State Machine ........................................................................... 94
30
Mechanical Representation of the Boxed Processor ....................................................... 99
31
Space Requirements for the Boxed Processor (Side View)............................................ 100
32
Space Requirements for the Boxed Processor (Top View)............................................. 100
33
Space Requirements for the Boxed Processor (Overall View) ........................................ 101
34
35
36
37
38
Boxed Processor Fan Heatsink Set Points................................................................... 106
39
40
41
Volumes ............................................................................................................... 111
42
Volume................................................................................................................. 112
43
Assembly Stack Including the Support and Retention Module ....................................... 113
44
Boxed Processor TMA Power Cable Connector Description ............................................ 114
45
(hatched area) ...................................................................................................... 115
46
Boxed Processor TMA Set Points............................................................................... 117
Datasheet
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Core™2 Duo Desktop
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Core™2 Extreme Processor X6800 ................. 42
5

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