Read/Write System; Head Selection - HP 7925D Service Manual

Theory of Operation
7925
sector address register, but instead a seek check will re-
sult (status bit 2
=
1).
When sector compare minus look-ahead occurs, the disc
drive will gate its identity onto a specific line on the
control bus that corresponds to the unit number of that
disc drive. This assumes, of course, that the disc drive has
its attention bit set (status bit 7
=
1) and an RQI com-
mand is active.
1-45. HEAD SELECTION. Information is read
from or written onto a data surface of the disc pack by
means of nine data heads. There is one data head for each
data surface. Each data head consists of a gapped ferrite
core mounted in a ceramic shoe. Data heads are gimbaled
and contoured to fly over the surface of the disc supported
by a thin cushion of air. Two windings are wound around
the ferrite core. They are connected at a common point and
phased such that the common point acts as a center tap.
The read/write system (see figure 4-28) consists of circuits
on I/O sector PCA-A2, servo PCA-A3, drive control PCA-
A4, and R/W preamplifier PCA-A6. All communication
between these PCA's occurs via motherboard PCA-A7.
The data heads connect directly to R/W preamplifier
PCA-A6. The purpose of the read/write system is to pro-
vide the means to read information from or write informa-
tion onto a data surface of the disc pack. Included in the
following are discussions relative to head selection, read
mode operation, write mode operation, and read/write
fault detection.
READ/WRITE SYSTEM
The legal address stored in the sector address register is
also continually compared with the present sector count
by the look-ahead comparator. This comparator forms
part of the rotational position sensing feature in each
disc drive. This feature (if enabled) permits a disc drive to
transfer its identity to the controller up to 15 sectors (5.2
milliseconds) before an actual sector compare occurs
(status bit 8
=
1). Four jumpers provide the means to add
a 4-bit binary number to the present sector count. If all
four jumpers are installed, a zero will be added to the
present sector count and the look-ahead feature will have
no effect. If all four jumpers are removed, 15 will be added
to the present sector count. Any combination of jumpers
may be used, however, RPS should be disabled when the
disc drive is connected to an HP 13037 Disc Controller.
The legal address stored in the sector address register is
continually compared with the present sector count by
the sector comparator. Once the sector presently passing
beneath the heads matches the addressed sector, the sec-
tor compare flip-flop will be clocked. When clocked during
a read or write operation, the sector compare flip-flop will
be clocked set (status bit 8
=
1) and the sector compare
signal will become active (SC
=
1) to enable the read/
write system for a data transfer operation. Sector com-
pare can be observed at the test point labeled "SC". It
will remain active until the end of the addressed sector is
forced (count 817) or the READ or WRITE command is
dropped.
1-44.
The inverted (PRE) output from the differential
preamplifier stage is also coupled to the input of the nega·,
tive level detector. The level detector detects the presence
of peaks in the servo code that exceed 0.33 volt in
amplitude. The output from the level detector can be ob-
served at the test point labeled "NLD".
The derived sector clock is coupled to a divide-by-840
counter. At each count of 840, the sector counter is clocked
to store the present sector count. This count corresponds to
the physical sector presently passing beneath the heads.
One revolution results in 53,760 clock transitions which
when divided by 840 equals 64 physical sectors. The pre-
sent sector count along with the head address are returned
to the controller whenever it issues an RQP command.
Each time the disc pack completes a revolution, the index
pattern is detected and the index pulse is generated to
clear both the divide-by-840 and sector counters. This will
initiate'the counting cycle for the next revolution.
The index pulse (lP) clears the CE index flip-flop. The "Q"
output of this flip-flop is inverted and becomes the CEP
signal. When the CEP signal is equal to logical one, a data
pack is in the disc drive. When the CEP signal is equal to
logical zero, a CE disc pack is in the disc drive. If a CE disc
pack is in the disc drive, circuitry on I/O sector PCA-A2
prevents writing on the CE disc pack.
The sector address register is initially cleared when NDPS
becomes active (NDPS
=
0). This occurs when power is
first applied or when the RUN/STOP switch is set to RUN.
This will establish a sector address of zero which will
remain in effect until the contents of the sector address
register are changed by either an ADR or XMS command.
Whenever an ADR or XMS command is issued by the
controller, a 6-bit sector address is also supplied. Bits D4
through D7 are checked to ensure that the address is legal
before it is stored in the sector address register (legal
sector addresses are 0 through 63). If bits D6 and D7 are
active, the supplied address is greater than 63 and is
therefore illegal. An illegal address is not stored in the
The output from the negative level detector is coupled to
the index detector where it sets a delay flip-flop. The
output from the flip-flop is coupled to a 7-bit shift register.
As the discs rotate counterclockwise from the beginning of
sector 0 through the end of sector 63, positive-true bits are
shifted into the shift register on the trailing edge of the
reference signal. A unique 6-bit index pattern is magneti-
cally recorded between physical sectors 0 and 63. When
the entire 6-bits of the index pattern have been shifted
into the shift register, an index pulse is generated on the
trailing edge of the next reference signal transition. This
index pulse can be observed at the test point labeled "IP".
It
will remain active for 3.31 microseconds.
speed of 2700 revolutions per minute. It is this output that
is used to clock the sector counting electronics on I/O
sector PCA-A2. Also, since the sector clock is phase locked
to the servo code, it tracks any variations in spindle speed.
The sector clock can be observed at the test point labeled
"SCL".
1-24