HP 7925D Service Manual page 192

The microprocessor module also contains the sector
counters and the sector compare logic for the disc drive.
These circuits are discussed in the sector sensing system
description (paragraph A-50).
Appendix A
Head Address
Target Sector
Status
Drive Type
Physical Sector
Current head address, currently
selected head
Target sector address
The present status of the disc drive
Drive type, current HP-IB device
address, rotational position sens-
ing (RPS) enable, and sector com-
pare flag
Physical sector presently passing
under head
7925
data by the data separator. The sync field is used to syn-
chronize the phase-locked loop (PLU of the separator.
Starting from the first I-bit of the preamble, bit-serial
data is clocked into the FIFO and the CRC checker. Data
written and read by the formatter/separator is compatible
with data processed by the formatter/separator in the HP
13037 Disc Controller.
A-lB. eRC Generator/Checker. During a WRITE
or INITIALIZE command, a CRC word is generated from
the preamble and data being written and is appended to
the end of the data field. During a VERIFY command, and
all READ commands except READ FULL SECTOR, the
CRC checker looks for a CRC word appropriate to the
preceding data and preamble fields. If a data error is
detected, a flag will be set to alert the microprocessor.
A-13. HP-IB INTERFACE MODULE. The HP-IB
interface module consists primarily of a PHI integrated
circuit that provides a logical interface between the con-
troller and the HP-IB. HP-IB is Hewlett-Packard's im-
plementation of IEEE Standard No. 488-1975, IEEE
Standard Digital Interface for Programmable Instrumen-
tation. 'Ib the microprocessor, the PHI appears as a bank of
eight registers, some of which are read-only, write-only,
and read/write registers. Four transceiver integrated cir-
cuits provide a physical interface between the PHI logic
levels and those of the HP-IB. The HP-IB device address is
obtained from the HP-IB DEVICE ADDRESS switch on
the control panel of the disc drive. At power-on, or on
completion of self test, the value set on the switch is loaded
into the HP-IB address register of the PHI.
A-14. DATA PATH MODULE. The data path
module consists of the following components.
A-15. FIFO and Data Serializer/Deserializer. A
16-level serial/parallel first-in, first-out (FIFO) buffer
memory device provides a measure of buffering for the
data passing through the controller. The FIFO also con-
verts bytes received from the HP-IB to the bit-serial form
required by the data formatter component (writing) and
reconstructs bytes from the bit-serial data stream supplied
by the data separator (reading).
A-16. Data Formatter. At the start of each sector of
a write operation, the data formatter automatically gen-
erates and writes a sync field (12 words of zeros). At the
completion of the sync field, the formatter clocks the data
(including the preamble) from the serial output of the
FIFO encodes it to a MFM (delay modulation) form, pre-
comp~nsates
for pulse crowding, and sends it to the disc
drive read/write system (paragraph A-51).
A-17. Data Separator. During a read operation, the
amplified MFM signal received from the disc drive read/
write system (paragraph A-51) is decoded into clock and
A-IO
A-19. DMA Machine. During data transfers, the
PHI chip and the FIFO handshake directly under the
control of the DMA machine. The DMA machine takes
direct control because the microprocessor cannot process
individual bytes at the required 937.5 kilobyte rate. In-
stead, the microprocessor keeps a count of the bytes trans-
ferred and switches the CRC generator/checker into the
data path at the proper time. The micropocessor starts up
the DMA machine at the beginning of each sector. The
machine stops by itself when anyone of the following
conditions is detected: a) End of Sector (normal stop), b)
Data Overrun (the channel plus all controller buffering
cannot match the burst transfer rate to or from the disc),
or c) End of Transfer (the EOI bit has been detected during
a write data operation).
A-20. OPERATION CONTROL SYSTEM
The operation control system (figure A-16) receives com-
mands and information for drive operations from the con-
troller, and outputs status information to the controller.
A-21. DRIVE IDENTIFICATION. Unless
addressed, the disc drive can respond only to a limited
number of HP-IB commands all of which are handled
complet~ly in the PHI chip, without controller interfer-
ence. The address to which the drive will respond is set by
disc drive HP-IB DEVICE ADDRESS switch S3, with the
selected address appearing at the display on the operator
panel. The address is read by the controller from the Drive
Type register after a self-test operation and as part of the
HP-IB command.
A-22. DRIVE OPERATION CONTROL. When
the disc drive is addressed by the HP-IB, the controller
will respond to commands and perform the appropriate
operations. Those operations whicH require drive func-
tions external to the controller are initiated by control
signals entered into the Function register by the control-
ler. These control signals are described in table A-2. If a