HP 7925D Service Manual page 205

Appendix A
This differential output is coupled to the input of an inte-
grated phase locked loop through the servo head signal
filter (low-pass filter). The sector clock developed by the
phase locked loop is coupled to a divide-by-eight counter
and is fed back to provide a reference signal to the phase
locked loop and a clocking signal to the index detector. The
reference signal can be observed at the test point labeled
"REF".
The developed sector clock is a square-wave with exactly
53,760 transitions per revolution or 2.42 MHz at a spindle
speed of2700 revolutions per minute. It is this output that
is used to clock the sector counting electronics on micro-
processor PCA-A2. Also, since the sector clock is phase
locked to the servo code, it tracks any variations in spindle
speed. The sector clock can be observed at the test point
labeled "SCL".
The inverted (PRE) output from the differential pre-
amplifier stage is also coupled to the input of the negative
level detector. The level detector detects the presence of
peaks in the servo code that exceed 0.33 volt in amplitude.
The output from the level detector can be observed at the
test point labeled "NLD".
The output from the negative level detector is coupled to
the index detector where it sets a delay flip-flop. The
output from the flip-flop is coupled to a 7-bit shift register.
As the discs rotate counterclockwise from the beginning of
sector 0 through the end of sector 63, positive-true bits are
shifted into the shift register on the trailing edge of the
reference signal. A unique 6-bit index pattern is magneti-
cally recorded between physical sectors 0 and 63. When
the entire 6-bits of the index pattern have been shifted
into the shift register, an index pulse is generated on the
trailing edge of the next reference signal transition. This
index pulse can be observed at the test point labeled
"iF".
It will remain active for 3.31 microseconds.
The derived sector clock is coupled to a divide-by-840
counter. At each count of 840, the sector counter is clocked
to store the present sector count. This count corresponds to
the physical sector presently passing beneath the heads.
One revolution results in 53,760 clock transitions which
when divided by 840 equals 64 physical sectors. Each time
the disc pack completes a revolution, the index pattern is
detected and the index pulse is generated to clear both the
divide-by-840 and sector counters. This will initiate the
counting cycle for the next revolution.
The sector address register is initially cleared when NDPS
becomes active (NDPS
=
0). This occurs when power is
first applied or when the RUN/STOP switch is set to RUN.
This will establish a sector address of zero which will
remain in effect until the contents of the sector address
register are changed by an ADR command. Whenever an
ADR command is issued by the controller, a 6-bit sector
address is also supplied. Bits D4 and D5 are both checked
to ensure that the address is legal before it is stored in the
sector address register (legal sector addresses are 0
through 63). If both bits are active, the supplied address is
greater than 63 and is therefore illegal. An illegal address
A-24
7925
is not stored in the sector address register, but instead a
seek check will result (status bit 3
=
1).
The legal address stored in the sector address register is
continually compared with the present sector count by the
sector comparator. Once the sector presently passing be-
neath the heads matches the addressed sector, the sector
compare flip-flop will be clocked. When clocked during a
read or write operation, the sector compare flip-flop will be
clocked set and the sector compare signal will become
active (SC
=
1) to enable the read/write system for a data
transfer operation. Sector compare can be observed at the
test point labeled "SC". It will remain active until the end
of the addressed sector is forced (count 816) or the READ
or WRITE command is dropped.
When jumper W360 is in place on microprocessor PCA-A2,
a sector look-ahead algorithm called Rotational Position
Sensing (RPS) is in effect. (The location ofjumper W360 on
PCA-A2 is shown in figure A-16.) Then, after a SEEK has
been completed, the response of the drive to a PARALLEL
POLL command on the HP-IB is enabled only during a
period of time (n
+
1) milliseconds long on each revolution
of the disc, when n is the unit number. This parallel poll
response window closes two sectors before the target sec-
tor. If the host CPU does not give the parallel poll within
this window, it must wait until the next revolution.
If RPS is not enabled, the disc drive will respond to paral-
lel poll immediately upon completing the SEEK, even
though the heads might not be anywhere near the target
sector. This could tie up the HP-IB for nearly 16 milli-
seconds waiting for a data transfer to begin.
A-51. READ/WRITE SYSTEM
The read/write system (see figure A-20) consists of circuits
on data PCA-A1, microprocessor PCA-A2, servo PCA-A3,
drive control PCA-A4, and R/W preamplifier PCA-A6. All
communication between these PCA's occurs via mother-
board PCA-A7 and interconnecting cables. The data heads
connect directly to R1W preamplifier PCA-A6. The pur-
pose of the read/write system is to provide tte means to
read information from or write information onto a data
surface of the disc pack. Included in the following are
discussions relative to head selection, read mode opera-
tion, write mode operation, and read/write fault detection.
A-52. HEAD SELECTION. Information is read
from or written onto a data surface of the disc pack by
means of nine data heads. There is one data head for each
data surface. Each data head consists of a gapped ferrite
core mounted in a ceramic shoe. Data heads are gimbaled
and contoured to fly over the surface of the disc supported'
by a thin cushion of air. Two windings are wound around
the ferrite core. They are
connect~d
at a common point and
phased such that the common point acts as a center tap.
These windings are used for both reading and writing by
detecting or producing a magnetic field at the gap in the
ferrite core.