Interface Settings; Multi-Device Settings - Texas Instruments DRA821 User Manual

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Register Name
Field Name
SPREAD_SPECTRUM
SS_PARAM1
_2
SS_PARAM2
FREQ_SEL
BUCK1_FREQ_SEL
BUCK2_FREQ_SEL
BUCK3_FREQ_SEL
BUCK4_FREQ_SEL
BUCK5_FREQ_SEL
FSM_STEP_SIZE
PFSM_DELAY_STEP
LDO_RV_TIMEOUT_
LDO1_RV_TIMEOUT
REG_1
LDO2_RV_TIMEOUT
LDO_RV_TIMEOUT_
LDO3_RV_TIMEOUT
REG_2
LDO4_RV_TIMEOUT
USER_SPARE_REGS
USER_SPARE_1
USER_SPARE_2
USER_SPARE_3
USER_SPARE_4
ESM_MCU_MODE_
ESM_MCU_EN
CFG
ESM_SOC_MODE_
ESM_SOC_EN
CFG
RTC_CTRL_2
XTAL_EN
LP_STANDBY_SEL
FAST_BIST
STARTUP_DEST
XTAL_SEL
PFSM_DELAY_REG_1 PFSM_DELAY1

5.11 Interface Settings

These settings detail the default interface, interface configurations, and device addresses. These settings cannot
be changed after device startup.
Register Name
Field Name
SERIAL_IF_CONFIG
I2C_SPI_SEL
I2C1_SPI_CRC_EN
I2C2_CRC_EN
I2C1_ID_REG
I2C1_ID
I2C2_ID_REG
I2C2_ID

5.12 Multi-Device Settings

These settings detail whether the device is a operating as a primary or secondary in the system. These settings
cannot be changed after device startup.
SLVUBY7A – OCTOBER 2020 – REVISED OCTOBER 2022
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Table 5-11. Miscellaneous NVM Settings (continued)
TPS6594141B-Q1
Value
Description
0x7
0x7
0xc
0xc
0x1
4.4 MHz
0x1
4.4 MHz
0x1
4.4 MHz
0x1
4.4 MHz
0x1
4.4 MHz
0xb
0xb
0xf
16ms
0xf
16ms
0xf
16ms
0xf
16ms
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
ESM_MCU disabled.
0x0
ESM_SoC disabled.
0x1
Crystal oscillator is enabled
0x0
LDOINT is enabled in standby
state.
0x0
Logic and analog BIST is run
at BOOT BIST.
0x3
ACTIVE
0x1
9 pF
0x54
0x54
Table 5-12. Interface NVM Settings
TPS6594141B-Q1
Value
Description
0x0
I2C
0x0
CRC disabled
0x0
CRC disabled
0x48
0x48
0x12
0x12
Copyright © 2022 Texas Instruments Incorporated
LP876441B1-Q1
Value
Description
0x7
0x7
0xc
0xc
0x1
4.4 MHz
0x1
4.4 MHz
0x1
4.4 MHz
0x1
4.4 MHz
0xb
0xb
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
ESM_MCU disabled.
0x0
Normal standby state is used.
0x0
Logic and analog BIST is run
at BOOT BIST.
0x3
ACTIVE
LP876441B1-Q1
Value
Description
0x0
I2C
0x0
CRC disabled
0x0
CRC disabled
0x4c
0x4C
0x13
0x13
Powering DRA821 with TPS6594-Q1 and LP8764-Q1
Static NVM Settings
23

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