Texas Instruments TPS6594-Q1 User Manual
Pmic for jacinto 7 dra829 and tda4vm automotive pdn-0b
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User's Guide
Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829
and TDA4VM Automotive PDN-0B
This User's Guide can be used as a guide for integrating the TPS6594-Q1 power management integrated circuit
(PMIC) into a system powering the DRA829 or TDA4VM processor.
1
Introduction.............................................................................................................................................................................2
2 Device Versions......................................................................................................................................................................
Connections..........................................................................................................................................................4
3.1 Power Mapping..................................................................................................................................................................
Mapping.................................................................................................................................................................7
4.1 Achieving ASIL-B System Requirements.........................................................................................................................
4.2 Achieving up to ASIL-D System Requirements................................................................................................................
Settings..............................................................................................................................................................13
5.2 Device Identification Settings...........................................................................................................................................
5.3 BUCK Settings.................................................................................................................................................................
Settings....................................................................................................................................................................16
5.5 VCCA Settings.................................................................................................................................................................
5.6 GPIO Settings..................................................................................................................................................................
5.7 Finite State Machine (FSM) Settings...............................................................................................................................
Settings..............................................................................................................................................................20
Settings...................................................................................................................................................23
5.10 Miscellaneous Settings..................................................................................................................................................
Settings............................................................................................................................................................25
5.12 Multi-Device Settings.....................................................................................................................................................
5.13 Watchdog Settings.........................................................................................................................................................
6 Pre-Configurable Finite State Machine (PFSM) Settings..................................................................................................
6.1 Configured States............................................................................................................................................................
6.2 PFSM Triggers.................................................................................................................................................................
6.3 Power Sequences............................................................................................................................................................
7 References............................................................................................................................................................................
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SLVUC32 - JUNE 2021
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ABSTRACT
Table of Contents
Systems..............................................................................................................................10
Settings........................................................................................................................13
Copyright © 2021 Texas Instruments Incorporated
Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM
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Automotive PDN-0B
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Table of Contents
Related Manuals for Texas Instruments TPS6594-Q1
Summary of Contents for Texas Instruments TPS6594-Q1
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Page 1: Table Of Contents
Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Automotive PDN-0B ABSTRACT This User’s Guide can be used as a guide for integrating the TPS6594-Q1 power management integrated circuit (PMIC) into a system powering the DRA829 or TDA4VM processor. Table of Contents Introduction.....................................2... -
Page 2: Introduction
2 Device Versions There are different orderlable part numbers (PNs) of the TPS6594-Q1 device available with unique NVM settings to support different end product use cases and processor types. The unique NVM settings for each PMIC... - Page 3 Device Versions Table 2-1. Dual TPS6594-Q1 Orderable Part Numbers for Independent MCU and Main PDN System PDN USE CASE Orderable Part Number TI_NVM_ID Orderable Part TI_NVM_I Error (TI_NVM_REV Number Signal (TI_NVM Monitor _REV) TPS65941212RWERQ1 0x12 (0x02) TPS65941111R 0x11 Combin •...
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Page 4: Processor Connections
Processor Connections www.ti.com 3 Processor Connections This section details how the dual TPS6594-Q1 power resources and GPIO signals are connected to the processor and other peripheral components in order to support the PDN use case. 3.1 Power Mapping Figure 3-1 shows the power mapping between the dual TPS6594-Q1 PMIC power resources and processor voltage domains required to support independent MCU and Main power rails. - Page 5 Base PDN MCU-only Suspend-to-RAM VDD_DDR_1V1 TPS62813-Q1 (BUCK, 3 A max) VCCQ Figure 3-1. Power Connections SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
- Page 6 TLV73318P- VPP_EFUS VPP_x(EFUSE) Optional E_1V8 TPS62813- BUCK VDD_DDR_ VDDS_DDR_BIAS, Required Required VDDS_DDR_IO Mem: VDD2 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
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Page 7: Control Mapping
PFSM across all power and digital resources. The GPIO_5 and GPIO_6 pins on the TPS6594-Q1 are assigned for this functionality. In addition, the primary PMIC's LDOVINT pin is connected to the secondary PMIC's ENABLE input to correctly initiate the PFSM. - Page 8 VIO ± 1.8V or 3.3V TPS62813-Q1 PDN FEATURES Base PDN MCU-only TPS62813-Q1 Suspend-to-RAM Figure 3-2. TPS6594-Q1 Digital Connections Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 9 DISABLE_ GPIO_8 PMICA_GPIO8 WDOG GPIO_9 PMICA_GPIO9 GPIO_10 WKUP1 PMIC_POWER_EN1 Required nRSTOUT_ GPIO_11 H_SOC_PORz_1V8 Required SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
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Page 10: Supporting Functional Safety Systems
Internal Diagnostics including voltage monitoring, temperature monitoring, and Built-In Self-Test Refer to the Safety Manual of the TPS6594-Q1 device for full descriptions and analysis of the PMIC functional safety features. These functional safety features can assist in achieving up to ASIL-D rating for a system. -
Page 11: Achieving Asil-B System Requirements
GPIO_7 of the primary TPS6594-Q1 PMIC is configured as the MCU error signal monitor, but will need to be enabled though the ESM_MCU_EN register bit. MCU reset is supported through the connection between the primary PMIC nRSTOUT pin and the MCU_PORz of the processor. - Page 12 Supporting Functional Safety Systems www.ti.com The current monitoring is enabled by default for all BUCKs and LDOs for the TPS6594-Q1 devices. Additionally, Figure 3-1 shows that the MCU domain of the processor is powered by different power resources of the PMICs than the main power domain of the processor.
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Page 13: Static Nvm Settings
5 Static NVM Settings The TPS6594-Q1 devices consist of fixed registers and configurable registers that are loaded from the NVM. For all NVM registers, the initial NVM settings that load into the registers are provided in this section. Note: these initial NVM settings can be changed during state transitions, such as moving from STANDBY to ACTIVE mode. -
Page 14: Device Identification Settings
ILIM comparators. BUCK3_VSEL BUCK3_VOUT_1 BUCK3_VOUT_1 BUCK3_PLDN Enabled; Pull-down resistor Enabled; Pull-down resistor BUCK3_RV_SEL Disabled Disabled Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... - Page 15 +5% / +50 mV +5% / +50 mV BUCK5_UV_THR -5% / -50 mV -5% / -50 mV SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
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Page 16: Ldo Settings
Linear regulator mode. Linear regulator mode. LDO4_VOUT LDO4_VSET 0x38 1.800 V 0x38 1.800 V Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 17: Vcca Settings
Disabled; Pull-up/pull-down resistor. resistor. GPIO1_DEGLITCH_EN 0x0 No deglitch, only No deglitch, only synchronization. synchronization. SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated... - Page 18 Disabled; Pull-up/pull-down resistor. resistor. GPIO7_DEGLITCH_EN 0x1 8 µs deglitch time. 8 µs deglitch time. Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 19 NRSTOUT_OD Open-drain output Open-drain output GPIO_OUT_1 GPIO1_OUT GPIO2_OUT GPIO3_OUT GPIO4_OUT GPIO5_OUT GPIO6_OUT GPIO7_OUT GPIO8_OUT SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
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Page 20: Finite State Machine (Fsm) Settings
Low; Masking sets signal Low; Masking sets signal value to '0' value to '0' Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... - Page 21 Interrupt generated Interrupt generated LDO3_ILIM_MASK Interrupt generated Interrupt generated LDO4_ILIM_MASK Interrupt generated Interrupt generated SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
- Page 22 Interrupt generated Interrupt generated SOC_PWR_ERR_MAS Interrupt generated Interrupt generated ORD_SHUTDOWN_MA Interrupt generated Interrupt generated Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
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Page 23: Powergood Settings
Masked PGOOD_SEL_3 PGOOD_SEL_LDO1 Masked Masked PGOOD_SEL_LDO2 Masked Masked PGOOD_SEL_LDO3 Masked Masked PGOOD_SEL_LDO4 Masked Masked SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated... -
Page 24: Miscellaneous Settings
Spread spectrum disabled SS_MODE Mixed dwell Mixed dwell SS_DEPTH No modulation No modulation SPREAD_SPECTRUM SS_PARAM1 SS_PARAM2 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 25: Interface Settings
CRC disabled I2C1_ID_REG I2C1_ID 0x48 0x48 0x4c 0x4C I2C2_ID_REG I2C2_ID 0x12 0x12 0x13 0x13 SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated... -
Page 26: Multi-Device Settings
Watchdog enabled. Watchdog disabled. 6 Pre-Configurable Finite State Machine (PFSM) Settings This section describes the default PFSM settings of the TPS6594-Q1 devices. These settings cannot be changed after device startup. Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 –... -
Page 27: Configured States
After these instructions are executed the PMICs wait for a valid ON Request (SU_ACTIVE trigger) before entering the ACTIVE state. The definition for each power state is described below: SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B... -
Page 28: Pfsm Triggers
TO_ACTIVE NSLEEP1 and STANDBY, ACTIVE, MCU NSLEEP2 are False False ACTIVE ONLY, Suspend-to-RAM high Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 29: Power Sequences
The TO_SAFE sequence will not reset the BUCK regulators until after the regulators are turned off as shown in Figure 6-2. SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated... - Page 30 0 us VDDA_3P3_USB GPIO11 TPS65941111-Q1 0 us EN_3V3IO_LDSW Figure 6-2. TO_SAFE_SEVERE and TO_SAFE Power Sequence Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 31 SAFE state. If an OFF request occurs, such as the ENABLE pin of the primary TPS6594-Q1 device being pulled low, the same power down sequence will occur, except that the PMICs will go to STANDBY (LP_STANDBY_SEL=0) or LP_STANDBY (LP_STANDBY_SEL=1) states, rather than going to the SAFE state.
- Page 32 3500 us VDDA_3P3_USB GPIO11 TPS65941111-Q1 3500 us EN_3V3IO_LDSW Figure 6-3. TO_SAFE_ORDERLY and TO_STANDBY Power Sequence Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 33 // Clear nRSTOUT and nRSTOUT_SOC REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x00 MASK=0xFC // Increment the recovery counter REG_WRITE_MASK_IMM ADDR=0xa5 DATA=0x01 MASK=0xFE SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
- Page 34 TPS65941212-Q1 2000 us MCU_PORZ nRSTOUT_SOC TPS65941212-Q1 2000 us PORZ Figure 6-4. ACTIVE_TO_WARM Power Sequence Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 35 // Set AMUXOUT_EN and CLKMON_EN, clear LPM_EN REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x18 MASK=0xE3 // Clear SPMI_LPM_EN REG_WRITE_MASK_IMM ADDR=0x82 DATA=0x00 MASK=0xEF SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
- Page 36 3500 us VDDSHV5 LDO2 TPS65941111-Q1 3500 us VDDA_3P3_USB Figure 6-6. PWR_SOC_ERROR with I2C_7 High Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 37 The MCU relevant BUCK and LDOs are reset to their default voltages at the time indicated in Figure 6-8, and finally the MCU_PORz signal is set high. SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
- Page 38 REG_WRITE_MASK_IMM ADDR=0x82 DATA=0x00 MASK=0xEF // TPS65941111Q1 // Set AMUXOUT_EN, CLKMON_EN // Clear LPM_EN REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x18 MASK=0xE3 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 39 MCU_PORZ MCU_PORZ MCU_PORZ Figure 6-9. TO_MCU with I2C_7 HIGH; VDD1 is Unchanged in Sequence SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
- Page 40 MCU_PORZ MCU_PORZ MCU_PORZ Figure 6-10. TO_MCU with I2C_7 LOW, VDD1 is Disabled in Sequence Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 41 BUCK3 as described in Table 5-3. SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
- Page 42 TPS65941212-Q1 12700 us MCU_PORZ nRSTOUT_SOC TPS65941212-Q1 12700 us PORZ Figure 6-11. TO_ACTIVE Sequence Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 43 // Set SPMI_LP_EN and FORCE_EN_DRV_LOW REG_WRITE_MASK_IMM ADDR=0x82 DATA=0x18 MASK=0xE7 //TPS65941111 // Set SPMI_LP_EN REG_WRITE_MASK_IMM ADDR=0x82 DATA=0x10 MASK=0xEF SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
- Page 44 3500 us EN_MCU3V3IO_LDSW EN_MCU3V3IO_LDSW EN_MCU3V3IO_LDSW Figure 6-12. TO_S2R and I2C_7 is Low on Both PMICs Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021 Automotive PDN-0B Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 45 EN_MCU3V3IO_LDSW EN_MCU3V3IO_LDSW EN_MCU3V3IO_LDSW Figure 6-13. To S2R and I2C_7 is High in Both PMICs SLVUC32 – JUNE 2021 Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM Submit Document Feedback Automotive PDN-0B Copyright © 2021 Texas Instruments Incorporated...
- Page 46 The TPS65941212 device also performs an additional 16 ms delay based upon the contents of the register (PFSM_DELAY_REG_2) to ensure that the TPS65941212 sequence finishes last. Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 and TDA4VM SLVUC32 – JUNE 2021...
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Page 47: References
Texas Instruments, DRA829/TDA4VM/AM752x Technical Reference Manual (Rev. B) reference model • Texas Instruments, TPS6594-Q1 Power Management IC (PMIC) with 5 Bucks and 4 LDOs for Safety- Relevant Automotive Applications data sheet • Texas Instruments, TPS6594-Q1 Safety Manual (request through mySecure) •... - Page 48 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2021, Texas Instruments Incorporated...