Table of Contents
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Index
A
AC power cables (table), 1-2
B
backplane
hybrid peripheral slots, 1-8
interoperability with CompactPCI, 1-5
overview, 1-5
PXI local bus, routing, 1-10
PXIe_SYNC_CTRL, 1-13
specifications, A-7
system controller slot, 1-6
system reference clock, 1-11
system timing slot, 1-9
trigger bus, 1-10
C
cables, power (table), 1-2
CE compliance specifications, A-6
chassis ambient temperature definitions, 2-4
chassis cooling considerations
ambient temperature definitions, 2-4
clearances, 2-2
chassis initialization file, 2-17
clearances for chassis cooling, 2-2
CLK10 rear connectors, 2-14
CompactPCI
interoperability with NI PXIe-1085
backplane, 1-5
configuration. See installation, configuration,
and operation
connector pinouts. See pinouts
cooling
air cooling of NI PXIe-1085 series
chassis, 2-2
filler panel installation, 2-4
setting fan speed, 2-4
slot blocker installation, 2-4
D
default configuration settings, 2-10
documentation, related, vii
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E
electromagnetic compatibility, A-5
EMC filler panel kit, 1-5
environmental management
specifications, A-6
Ethernet LED behavior (figure), 2-10
external clock source specifications, A-8
F
fan module, replacing, 1-5, 3-6
fan, setting speed, 2-4
filler panel installation, 2-4
front panel, securing, 2-5
G
ground, connecting, 2-6
H
hybrid peripheral slots, description, 1-8
hybrid slot pinouts
P1 connector (table), B-9
XP3 connector (table), B-10
XP4 connector (table), B-10
I
IEC 320 inlet, 2-6
inhibit mode switch, 2-14
installation, configuration, and operation
chassis initialization file, 2-17
connecting safety ground, 2-6
filler panel installation, 2-4
high vibration environment, 2-4
installing a PXI Express system
controller, 2-7
peripheral module installation, 2-8
PXI Express configuration in
MAX, 2-15
PXI-1 configuration in MAX, 2-15
rack mounting, 2-5
remote voltage monitoring and
inhibiting interface, 2-12
© National Instruments | I-1
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