HP 8559A Operation And Service Manual page 385

Spectrum analyzer
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MODEL 8559A
A simplified schematic of the first LC pole is shown in Figure 8-53. The fundamental frequency-determining
components are L6 and the center-tapped capacitance C16* and C20*. Positive feedback is applied to the center-
tap at 21.4 MHz to compensate for losses in the tank circuit. The application of feedback makes it important
that C16* and C20* be about the same value for proper pole operation. The level of the feedback is controlled
by CR5, acting as a variable resistance. LC feedback control R26 establishes the current through CR5 and its
resistance.
When an LC filtered bandwidth is selected, BW5F is at
+
Control line BWSF reverse biases CR8 (block B), disabling the crystal pole, and forward biases CR1 (block B),
opening the dc bias path to 4 2 (see Figure 8-47). During LC operation, CR6 is reverse biased, keeping C28 out
of the circuit. When a crystal filtered bandwidth is selected, BWSF forward biases CR6 and allows C28 to
ground the signal path.
Unity Gain Buffer Amplifier (E)
Operation of the Unity Gain Buffer Amplifier is similar to the 10 dB Input Buffer Amplifier, except that it has
an FET input (Q5) and unity gain. The input signal path is activated by the BWSF line, which switches on CR9
(during LC mode) or CR8 (during crystal mode).
When the crystal mode is selected, the current through the input FET (Q5) is determined by 4 6 and constant
current sink 4 7 (which sinks about 4 mA). During LC mode, current is supplied through R37 and CRlO from
BWSE The input FET current is a good indication of the stage's operation and can be monitored by measuring
the gate-to-source voltage. This voltage should be between
the voltage).
Capacitor C68 and
form a feedback circuit that tunes Q7 to
FEEDBACK) adjusts the feedback and controls the stage gain as did R5 and R6 in block B.
FIGURE 8-53. FIRST LC POLE, SIMPLIFIED SCHEMATIC
+
+
R25
(FEEDBACK)
R24
+
+
21.4 MHz.
Trimmer Resistor R31 (XTL
SERVICE
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