HP 8559A Operation And Service Manual page 352

MODEL 8559A
SWEEP GENERATORIBANDWIDTH CONTROL ASSEMBLY A9, CIRCUIT DESCRIPTION
The Sweep Generator/Bandwidth Control Assembly A9 consists of the sweep generator circuit, the sweep
trigger circuits, the resolution bandwidth control circuits, the video filtering circuits, the sweep attenuator
circuit, and the sweep offset circuit.
A linear sweep from
-
free run mode with sweep times automatically generated as a function of the FREQ SPAN/DIV, RESOLU-
TION BW, VIDEO FILTER, and BAND settings.
Fixed calibrated sweep times are available, ranging from 2 microseconds per division to 10 seconds per division.
This equals a full sweep time (10 divisions) of 20 microseconds to 100 seconds. Fixed sweep times are set with
the SWEEP TIME/DIV control and are used mainly in zero span to determine the modulation frequency of an
input signal. Modulation frequency determination is possible because during zero span operation the analyzer
displays the signal in the time domain rather than the frequency domain. The sweep can also be controlled
manually from the front panel with the MAN sweep control.
Besides internal triggering, SINGLE, VIDEO, and LINE triggering modes are also available. SINGLE starts or
stops a single sweep from the front panel. VIDEO triggering allows the sweep to be synchronized with the
displayed video signal. LINE mode synchronizes the sweep with the line frequency. Single sweeps can be initi-
ated via HP-IB if an HP 853A Spectrum Analyzer Display is being used.
The resolution bandwidth control circuit has three functions: First, it provides bandwidth-filter-control current
to the PIN diodes on the Bandwidth Filter assemblies (A1 1 and A13). Second, it provides current to the sweep
generator current source (via the AST line) to control the automatic sweep time circuit as a function of resolu-
tion bandwidth. Third, it switches in capacitance to the video filter to provide video filtering as a constant
percentage of resolution bandwidth.
The sweep attenuator circuit attenuates the sweep ramp to the Frequency Control Assembly A7 in proportion to
the FREQ SPAN/DIV selected. It also provides current to the sweep generator current source (via the AST line)
to control the automatic sweep time circuit as a function of the FREQ SPAN/DIV control setting. Note, the
sweep ramp passes through the Marker Assembly A8 before being attenuated by the sweep attenuator.
Sweep Generator
The sweep generator circuit comprises the current source, the buffer amplifier, the comparator, and the retrace-
out buffer amplifier. A simplified schematic is shown in Figure 8-34.
When AUTO sweep is selected, the voltage ramp is generated as follows: The ramp begins when the dead time
capacitor (comprising C10 and Cl1 in block L) charges to about
drives pin 2 of the comparator (block
+
+
H)
below +2.78\! The output of the comparator then rises to about
+
SERVICE
897