Supermicro X11DPH-I User Manual page 87

Mirror Mode
Use this feature to confi gure the mirror mode settings for all 1LM/2LM memory modules
installed in the system which will create a duplicate copy of data stored in the memory to
increase memory security, but it will reduce the memory capacity into half. The options are
Disable, Mirror Mode 1LM, and Mirror Mode 2LM.
Memory Rank Sparing
Select Enable to support memory-rank sparing to optimize memory performance. The
options are Enable and Disable.
Note: This item will not be available when memory mirror mode is set to Mirror Mode
1LM or an AEP device is plugged in.
Correctable Error Threshold
Use this item to enter the threshold value for correctable memory errors. The default setting
is 100.
Intel Run Sure
Select Enable to use Intel Run Sure Technology which will enhance critical data protection
and increase system uptime and resiliency. The options are Enable and Disable.
SDDC/SDDC Plus One
SDDC (Single Device Data Correction) checks and corrects single-bit or multiple-bit (4-bit
max.) memory faults that affect an entire single x4 DRAM device. SDDC Plus One, an
enhanced feature to SDDC, copies data stored in a faulty DRAM device to a spare device
when an SDDC event has occurred. After the event, the SDDC+1 ECC mode is activated
to protect against any additional memory failure caused by a 'single-bit' error in the same
memory rank. The options are Enable and Disable. (Note: SDDC or SDDC Plus One is
available when it is supported by the processors installed on the motherboard.)
ADDDC (Adaptive Double Device Data Correction) Sparing (Available when Intel
Run Sure is set to Enable)
Select Enable for Adaptive Double Device Data Correction (ADDDC) support, which will
not only provide memory error checking and correction but will also prevent the system
from issuing a performance penalty before a device fails. Please note that virtual lockstep
mode will only start to work for ADDDC after a faulty DRAM module is spared. The options
are Enable and Disable.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected in a memory module and send the corrections to the requestor (the original
source). When this feature is set to Enable, the IO hub will read and write back one cache
line every 16K cycles if there is no delay caused by internal processing. By using this
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Chapter 4: UEFI BIOS