Supermicro X11DPH-I User Manual page 86

Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Restore NVDIMMs
Select Enable to restore the functionality and the features of NVDIMMs. The options are
Enable and Disable.
Interleave NVDIMMs
If this item is set to Enable, all onboard NVDIMM modules will be confi gured together as
a group for the interleave mode. If this item is set to Disable, individual NVDIMM modules
will be confi gured separately for the interleave mode. The options are Enable and Disable.
Reset Trigger ADR (Async DIMM Self-Refresh)
Upon system power loss, an ADR sequence will be triggered to allow ADR to fl ush the
write-protected data buffers in the memory controller and place the DRAM memory in self-
refresh mode. When this process is complete, the NVDIMM will then take control of the
DRAM memory and transfer the contents to the onboard Flash memory. After the transfer is
complete, the NVDIMM goes into a zero power state. The data transferred will be retained
for the duration specifi ed by the fl ash memory. The options are Enable and Disable.
S5 Trigger ADR
Select Enabled to support S5-Triggered ADR to enhance system performance and data
integrity. The options are Disabled and Enabled.
IMC Interleaving
Use this feature to confi gure interleaving settings for the IMC (Integrated Memory
Controller), which will improve memory performance. The options are 1-way Interleave,
2-way Interleave, and Auto.
Memory Topology

This item displays the information of onboard memory modules as detected by the BIOS.
•
P1 DIMMA1/DIMMA2/DIMMB1/DIMMC1/DIMMD1/DIMMD2/DIMME1/DIMMF1
•
P1DIMMA1/DIMMA2/DIMMB1/DIMMC1/DIMMD1/DIMMD2/DIMME1/DIMMF1
Memory RAS (Reliability_Availability_Serviceability) Confi guration

Use this submenu to confi gure the following Memory RAS settings.
Static Virtual Lockstep Mode
Select Enable to support Static Virtual Lockstep mode to enhance memory performance.
The options are Enable and Disable.
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