Supermicro X11DPH-I User Manual page 83

confl ict. Select Feature Precedent to degrade UPI topology if system options are in confl ict.
The options are Topology Precedence and Feature Precedence.
Link L0p Enable
Select Enable for the system BIOS to enable Link L0p support which will allow the CPU
to reduce the UPI links from full width to half width in the event when the CPU's workload
is low in an attempt to save power. This feature is available for the system that uses Intel
processors with UPI technology support. The options are Disable, Enable, and Auto.
Note: You can change the performance settings for non-standard applications by us-
ing this parameter. It is recommended that the default settings be used for standard
applications.
Link L1 Enable
Select Enable for the BIOS to activate Link L1 support which will power down the UPI links
to save power when the system is idle. This feature is available for the system that uses
Intel processors with UPI technology support. The options are Disable, Enable, and Auto.
Note: Link L1 is an excellent feature for an idle system. L1 is used during Package
C-States when its latency is hidden by other components during a wakeup.
IO Directory Cache (IODC)
Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating
memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the IODC to
generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable,
Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote
InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WCiLF.
SNC
Select Enable to use "Sub NUMA Clustering" (SNC), which supports full SNC (2-cluster)
interleave and 1-way IMC interleave. Select Auto for 1-cluster or 2-cluster support depending
on the status of IMC (Integrated Memory Controller) Interleaving. The options are Disable,
Enable, and Auto.
XPT Prefetch
Select Enable for XPT (Extended Prediction Table) Prefetch support which will allow an
LLC request to be duplicated and sent to an appropriate memory controller based on the
recent LLC history to reduce latency. The options are Enable, and Disable.
KTI Prefetch
If this feature is set to Enable, the KTI prefetcher will preload the L1 cache with data
deemed relevant to allow the memory read to start earlier on a DDR bus in an effort to
reduce latency. The options are Enable and Disable.
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Chapter 4: UEFI BIOS