Table of Contents
Advertisement
Note on Decoupling
As in any system, the PCB layout and
supply decoupling can influence the
system performance, particularly with
respect to noise.
CODSP:
• It is recommended to connect V3VD
and V3VA (digital and analog sup-
ply pins) in a star configuration from
the supply (either from the SH LIC or
an external supply), and each pin be
independently decoupled using 10µF
in parallel with 100nF.
In 2-line systems using the SHLIC's
regulator to supply the CODSP only
(i.e. no other use is made of the regu-
lator), one SHLIC may be used to
provide V3VD power and the other
V3VA, thus giving improved decou-
pling between analog and digital
supplies. See figure 4.
• The VAG line (analog signal refer-
ence) must always be properly
decoupled using 100nF, placed as
close as possible to the CODSP
device.
SHLIC:
• The SHLIC should use separate
100nF decoupling capacitors
between VDD and GNDB and VDD
and GNDA. When the on-board reg-
ulator of the SHLIC is not used, no
capacitor is required at the V3V pin
of this device.
V3V
MTC-30132
SH LIC
GNDB
GNDA
Ground
star-point
GNDA
GNDB
MTC-30132
V3V
SH LIC
MTC-30132
SH LIC
GNDB
GNDA
Ground
star-point
GNDA
GNDB
MTC-30132
SH LIC
Fig. 4:
MTC-20132 CODSP Recommended Power-Supply
Decoupling Arrangements
12
MTK-40131
V3VA
GNDA
VAG
GNDD
V3VD
+3.3V Star point
V3VA
GNDA
VAG
GNDD
V3VD
MTC-20132
CODSP
MTC-20132
CODSP
10 µF Ta
100 nF Cer
Advertisement
Table of Contents
