Ac Characteristics (Shlic); Fig. 14: Block Diagram Showing The Gains In The Various Signal Paths In The Shlic; Table 33: Typical Gains - Alcatel MTK-40131 Datasheet And User Manual

Sh pots chipset
Table of Contents

Advertisement

AC Characteristics
(SHLIC)
(0 dBm : 1 mW in 600 ohm)
Unless otherwise stated, the characteris-
tic limits apply over the operating condi-
tions specified above, and each combi-
nation of the drive bits unless otherwise
stated.
AWBIAS
Rprot
RB
AW
ZL
VL
Vab
BW
RB
Rprot
BWBIAS
Fig. 14: Block diagram showing the gains in the various signal
paths in the SHLIC.
Receive Path
Equation :
Vab
=
=
Grx
GR G
(
3
G
2
Vrx
This equation is valid for an open loop
configuration. This does not incorporate
the Zco synthesis, which is defined by
the feedback from TX to RX. This func-
tion is performed in the CODSP.
All parameters are specified in the pres-
ence of a longitudinal current of max. 5
mAp and a DC current of between 0
mA and the current limit. The behaviour
of the chip in presence of longitudinal
voltages is not tested in production.
G2
GR
G4
G3
G1
Sense
Bridge
G5
Transmit Path
Equation :
Vx
2
RB
=
=
)
Gtx
VL
ZL
This equation is valid under open loop
conditions.
MTK-40131
The different gains in the signal paths
are shown in fig 14. The values of the
gains are in the following table.

Table 33: Typical Gains

RX
DCC
I/O to ADSP
(Ref. VAG)
The gains in the table above are not
tested. They are mentioned for informa-
TX
tion only. The pin-to-pin gains as listed
in the tables below (Grx, Gtx, ...) are
DCO
tested and guaranteed
In case of Ringing, the receive gain is
changed from GR to GR', the transmit
gain factor G1 is changed to G1'.
The default test condition of the input
bits is: PU=1, RNG=0, BR=0/1. DCC
is shorted to VAG.
G
36
Gain
Factor
G1
+ 1.66
G1'
0.079
G2
2
G3
-2
G4
15
G5
- 1/8
GR
1
GR'
35/2

Advertisement

Table of Contents
loading

Table of Contents