Supermicro X13SEW-TF User Manual page 83

The following information is displayed:
•
PCIe Port Link Status
•
PCIe Port Link Max
•
PCIe Port Link Speed
Data Link Feature Exchange
Use this feature to enable or disable the data link feature negotiation in the Data
Link Feature Capabilities (DLFCAP) register. The options are Disable and Enable.
PCIe Port Max Payload Size
Selecting Auto for this feature enables the motherboard to automatically detect the
maximum Transaction Layer Packet (TLP) size for the connected PCIe device, al-
lowing for maximum I/O efficiency. Selecting 128B or 256B designates maximum
packet size of 128 or 256. The options are 128B, 256B, 512B, and Auto.
Equalization Bypass to Highest Rate
Enable this feature to bypass the equalization of intermediate data rates. This will
reduce the time for link training in PCIe 5.0 devices. The options are Disable and
Enable.
IOAT Configuration

Relaxed Ordering
Select Yes to enable Relaxed Ordering support. This feature allows certain transactions
to violate the strict-ordering rules of PCI bus for a transaction to be completed prior
to other transactions that have already been enqueued. The options are No and Yes.
Intel® VT for Directed I/O (VT-d)

Intel VT for Directed I/O (VT-d)
®
Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support by
reporting the I/O device assignments to the Virtual Machine Monitor (VMM) through
the DMAR ACPI tables. This feature offers fully-protected I/O resource sharing across
Intel platforms, providing greater reliability, security and availability in networking and
data-sharing. The options are Enable and Disable.
Pre-boot DMA Protection (Available when "Intel
set to Enable)
Enable this feature to help block DMA attacks. The options are Enable and Disable.
VT for Directed I/O (VT-d)" is
®
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Chapter 4: UEFI BIOS