Integrated Peripherals - Taiwan Commate Computer Inc. S630MA Quick Installation

Choose 4, 8, 16, 32, 64, 128, 256MB. Memory-mapped, graphics data structures can reside in the Graphics
Aperture.
3.4.13 Graphic Window WR Combin
Use this item to enable or disable data combination from buffer then write to memory feature.
3.4.14 Concurrent function (MEM) & (PCI)
Use these items to enable or disable concurrent memory/PCI and CPU action.
3.4.15 PCI Delayed Transaction
If the chipset has an embedded 32-bit write buffer to support delay transaction cycles, you can enable this
item to provide compliance with PCI Ver. 2.1 specifications. We recommend that you leave this item at the
default value.
3.4.16 Memory Parity Check
This item enables a parity check during boot-up memory testing. Only set this item to enabled if you are
using DRAM memory with parity.

3.5 Integrated Peripherals

You can control Input and Output functions from this screen.
> SIS 630 OnChip IDE Device
> SIS 630 OnChip PCI Device
> SIS 950 SuperIO Device
USB Controller
USB Keyboard Support
IDE HDD Block Mode
Init Display First
System Share Memory Size
3.5.1 SIS 630 OnChip IDE Device
Internal PCI/IDE
IDE Primary Master PIO
IDE Primary Slave PIO
IDE Secondary Master PIO
IDE Secondary Slave PIO
IDE Primary Master UDMA
IDE Primary Slave UDMA
IDE Secondary Master UDMA
IDE Secondary Slave UDMA
IDE Burst Mode
Figure 3-5 Integrated Peripherals
CMOS Setup Utility - Copyright ( C ) 1984 - 2000 Award Software
¯ ® ¬: Move
Enter : Select
F5 : Previous Value
CMOS Setup Utility - Copyright ( C ) 1984 - 2000 Award Software
Integrated Peripherals
Press Enter
Press Enter
Press Enter
Enabled
Disabled
Enabled
PCI Slot
8 MB
+/-/PU/PD : Value F10 : Save ESC : Exit F1 : General Help
F6 : Fail-Safe Defaults F7 : Optimized Defaults
SIS 630 OnChip IDE Device
Both
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Enabled
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