Intel 82562EZ Design Manual page 16

82540EP/82541(PI/GI/EI) & 82562EZ(EX) Dual Footprint Design Guide
3.1.1.6 Load Capacitance
The formula for crystal load capacitance is as follows:
where C1 = C2 = 22 pF (as suggested in most Intel reference designs)
and C
within the Ethernet controller package
An allowance of 3 pF to 7 pF accounts for lumped stray capacitance. The calculated load
capacitance is 16 pF with an estimated stray capacitance of about 5 pF.
Individual stray capacitance components can be estimated and added. For example, surface mount
pads for the load capacitors add approximately 2.5 pF in parallel to each capacitor. This technique
is especially useful if Y1, C1 and C2 must be placed farther than approximately one-half (0.5) inch
from the controller. It is worth noting that thin circuit boards generally have higher stray
capacitance than thick circuit boards.
Standard capacitor loads used by crystal manufacturers include 16 pF, 18 pF and 20 pF. Any of
these values will generally operate with the controller. However, a difference of several picofarads
between the calibrated load and the actual load will pull the oscillator slightly off frequency.
Note: C1 and C2 may vary by as much as 5% (approximately 1 pF) from their nominal values.
3.1.1.7 Shunt Capacitance
The shunt capacitance parameter is relatively unimportant compared to load capacitance. Shunt
capacitance represents the effect of the crystal's mechanical holder and contacts. The shunt
capacitance should equal a maximum of 6 pF (7 pF is also acceptable).
3.1.1.8 Equivalent Series Resistance
Equivalent Series Resistance (ESR) is the real component of the crystal's impedance at the
calibration frequency, which the inverting amplifier's loop gain must overcome. ESR varies
inversely with frequency for a given crystal family. The lower the ESR, the faster the crystal starts
up. Use crystals with an ESR value of 50 Ω or better.
Note: Check the specific controller documentation carefully; some devices may have tighter ESR
requirements. For example, Intel recommends that 82541EI/GI devices use crystals with an ESR
value of 20 Ω or less.
3.1.1.9 Drive Level
Drive level refers to power dissipation in use. The allowable drive level for a Surface Mounted
Technology (SMT) crystal is less than its through-hole counterpart, because surface mount crystals
are typically made from narrow, rectangular AT strips, rather than circular AT quartz blanks.
8
C =
L
= allowance for additional capacitance in pads, traces and the chip carrier
stray
( ⋅ )
C1 C2
------------------------- + C
( )
stray
C1 + C2