Spi Interface / Multiplexed I2S Interface - YUGE CLM920 TD3 Usage Manual

Lte module hardware
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CLM920 TD3 LTE Module Hardware Usage Guide

3.14 SPI interface / multiplexed I2S interface

The CLM920 TD3 provides an SPI interface with a maximum clock rate of 50MHz. In
addition, the module can only be used as the master, and the interface voltage domain is 1.8V.
Signal
Pin
name
37
SPI_CS_N
38
SPI_MOSI
39
SPI_MISO
40
SPI_CLK
The SPI interface of the CLM920 TD3 module can also be used as I2S. It can be
connected to the CODEC. The existing I2S supports the Nuvoton NAU8810 by default.
Pin
Signal name
37
I2S_D1
38
I2S_WS
I2S_D0
39
Shanghai Yuge Information Technology co., LTD
Table 3-22 SPI Pin Definitions
Descripti
Para
I/O
on
meter
DO
SPI chip
VOH
selection
VOL
DO
SPI data
VOH
output
VOL
DI
SPIO
VIH
data input
VIL
DO
SPI clock
VOH
VOL
Table 3-23 I2S pin definition
I/O Description
IO
I2S serial data
I2S command
IO
selection
IO
I2S serial data
Level value (V)
Min
Typical
1.35
1.8
0
1.35
1.8
0
1.2
1.8
-0.3
1.35
1.8
0
Level value (V)
Param
eter
Min
Typical
VOH
1.35
1.8
VOL
0
VIH
1.2
1.8
VIL
-0.3
VOH
1.35
1.8
VOL
0
VIH
1.2
1.8
VIL
-0.3
VOH
1.35
1.8
VOL
0
VIH
1.2
1.8
VIL
-0.3
Remarks
Max
2
Multiplexing
I2S_D1
0.45
2
Reuse
I2S_WS
0.45
2
Multiplexing
I2S_D0
0.6
2
Multiplexing
I2S_CLK
0.45
Rema
rks
Max
2
0.45
2
0.6
2
0.45
2
0.6
2
0.45
2
0.6
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