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CLM920 TD3 LTE Module Hardware Usage Guide
The following figure shows the STATUS reference circuit design:
3.11 PCM digital voice interface
The CLM920 TD3 module provides a set of PCM audio interfaces supporting 8-bit
A-rate, U-rate and 16-bit linear short frame encoding formats with PCM_SYNC of 8kHZ and
PCM_CLK of 2048kHZ.
Pin
Signal name
24
PCM_IN
25
PCM_OUT
26
PCM_SYNC
27
PCM_CLK
Characteristic
Encoding format
Data bit
Master-slave mode
PCM clock
PCM frame synchronization
Shanghai Yuge Information Technology co., LTD
Figure 3-19 STATUS Pin Reference Circuit
Table 3-18 PCM pin definition
I/O
Description
DI
PCM data input
DO
PCM data output
PCM frame sync
DO
signal
DO
PCM clock pulse
Table 3-19 PCM specific parameters
Level value (V)
Para
meter
Min
VIH
1.2
VIL
-0.3
VOH
1.35
VOL
0
VOH
1.35
VOL
0
VOH
1.35
VOL
0
Description
Linear
16bits
Master/slave mode
2048kHz
Short frame
Rem
arks
Typical Max
1.8
2
0.6
1.8
2
0.45
1.8
2
0.45
1.8
2
0.45
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