AOpen AX5TC User Manual page 65

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AWARD BIOS
Chipset Features à PCI Passive Release
PCI Passive Release
This item lets you control the Passive Release
function of the PIIX4 chipset (Intel PCI to ISA bridge).
Enabled
This function is used to meet latency of ISA bus
Disabled
master. Try to enable or disable it, if you have ISA
card compatibility problem.
Chipset Features à PCI Delayed Transaction
PCI Delayed
This item lets you control the Delayed Transaction
Transaction
function of the PIIX4 chipset (Intel PCI to ISA bridge).
This function is used to meet latency of PCI cycles to
Enabled
or from ISA bus. Try to enable or disable it, if you
Disabled
have ISA card compatibility problem.
Chipset Features à Mem. Drive Str. (MA/RAS)
Mem. Drive Str.
This option controls the driving strength of memory
(MA/RAS)
address and control signals. It is recommended to
use less driving current for light memory loading, to
10mA/10mA
prevent undershoot or overshoot.
10mA/16mA
16mA/10mA
16mA/16mA
3-16

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