AOpen AX5TC User Manual page 47

There is an important parameter affects SDRAM performance, CAS Latency
Time. It is similar as CAS Access Time of EDO DRAM and is calculated as
number of clock state. The SDRAM that AOpen had tested are listed below. If
your SDRAM has unstable problem, go into BIOS "Chipset Features Setup",
change CAS Latency Time to 3 clocks.
Manufacturer Model
Samsung KM416511220AT-G12
NEC D4S16162G5-A12-7JF
Hitachi HM5216805TT10
Fujitsu 81117822A-100FN
TI TMX626812DGE-12
TI TMS626812DGE-15
TI TMS626162DGE-15
TI TMS626162DGE-M67
The driving capability of new generation chipset is limited because the lack of
memory buffer (to improve performance). This makes DRAM chip count an
important factor to be taking into consideration when you install DIMM.
Unfortunately, there is no way that BIOS can identified the correct chip count,
you need to calculate the chip count by yourself. The simple rule is: By visual
inspection, use only DIMM which is less than 16 chips.
Warning : Although Intel TX chipset supports x4 SDRAM chip.
Due to loading issue, it is not recommended to use this kind of
SDRAM.
Tip: The DIMM chip count can be calculated by following
example:
For 64 bit DIMM using 1M by 16 bit SDRAM, the chip count is
64/16=4 chips.
Hardware Installation
Suggested CAS 5V Tolerance
Latency Time
2 Yes
2 No
2 No
2 No
2 Yes
3 Yes
3 Yes
3 Yes
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