Sony PCS-1500 Service Manual page 107

[UART block]
UART(IC201)
XR16C850
from/to
CPU BLOCK
HCS_USR \CS
HA1-3 A0-2
3
\HRD \IOR
\HWR \IOW
HD0-7 D0-7
8
IRQ_USR INT
RES_ALL \RESET
XTAL2
\SLEEP
Fig. 3-9 shows the connection of the UART block.
The combination of IC201 (UART) and IC203 (Transceiver) is used for the T.120 port. IC201 operating
clock (3.6864 MHz) is generated by the crystal oscillator (X200). IC203 shuts down when the "SLEEP"
signal coming from the CPU block goes low. All of the control lines are available at the T.120 port.
The combination of IC202 (UART) and IC204 (Transceiver) is used for the camera (PCS-C150/C150P).
The operating clock of IC202 is the output of IC201. The control lines other than the DTR are not used,
but are looped back. The general-purpose output ports of IC202 are used for the "A25" and "REQ/REG"
signal of the PCMCIA interface.
IC201 and IC202 are reset by the "RES_ALL" signal that is supplied from the CPU block. Interrupt
signals are output from IC201 and IC202 respectively.
It operates on the +5 V power supply voltage.
PCS-1500/1500P
Transceiver(IC203)
MAX3241CAI
from/to
T.120 Port
\CD
RXD
TXD
\DTR
\DSR
\RTS
\CTS
\RI
\SHDN
Fig. 3-9 UART Block
3-2. Circuit Description of the Respective Boards
UART(IC202)
ST16C550
from/to
CPU BLOCK
HCS_CAM \CS
HA1-3 A0-2
3
\HRD \IOR
\HWR \IOW
HD0-7 D0-7
8
IRQ_CAM INT
RES_ALL \RESET
XTAL1
Transceiver(IC204)
MAX3222CAP
from/to
\CD
Camera
RXD
TXD
\DTR
\DSR
\RTS
\CTS
\OP1
to PCMCIA BLOCK
\OP2
3-17