Trip/ Close Circuit Supervision (74Tcs & 74Ccs); Figure 5-7 Logic Diagram: Broken Conductor Function (46Bc); Figure 5-8 Logic Diagram: Trip Circuit Supervision Feature (74Tcs); Figure 5-9 Logic Diagram: Close Circuit Supervision Feature (74Ccs) - Siemens 7SR10 Argus Series Manual

Overcurrent relay
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46BC Element
Enabled
Disabled
Inhibit 46BC
46BC U/C
46BC U/C Guard
Guarded
Setting
Yes
C
No
IL1
IL2
IL3
Figure 5-7
5.7
Trip/ Close Circuit Supervision (74TCS & 74CCS)
The relay provides three trip and three close circuit supervision elements, all elements are identical in operation
and independent from each other allowing 3 trip and 3 close circuits to be monitored.
One or more binary inputs can be mapped to 74TCS-n. The inputs are connected into the trip circuit such that at
least one input is energised when the trip circuit wiring is intact. If all mapped inputs become de-energised, due to
a break in the trip circuit wiring or loss of supply an output is given.
The 74TCS-n Delay setting prevents failure being incorrectly indicated during circuit breaker operation. This delay
should be greater than the operating time of the circuit breaker.
The use of one or two binary inputs mapped to the same Trip Circuit Supervision element (e.g. 74TCS-n) allows
the user to realise several alternative monitoring schemes.
74TCS-n
Enabled
Disabled
74TCS-n
74TCS-n
Figure 5-8
74CCS-n
Enabled
Disabled
74CCS-n
74CCS-n
Figure 5-9
©2018 Siemens Protection Devices Limited
&
IL1
NPS
IL2
Filter
IL3
IL1
PPS
IL2
Filter
IL3
Logic Diagram: Broken Conductor Function (46BC)
&
≥1
NOTE: Diagram shows two binary inputs mapped
to the same Trip Circuit Supervision element
Logic Diagram: Trip Circuit Supervision Feature (74TCS)
&
≥1
NOTE: Diagram shows two binary inputs mapped
to the same Close Circuit Supervision element
Logic Diagram: Close Circuit Supervision Feature (74CCS)
46BC Setting
c
I2
I1
74TCS-n Delay
74CCS-n Delay
7SR10 Description of Operation
46BC Delay
46BC
TCS-n
CCS-n
Chapter 1 Page 67 of 77

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