Time Delayed Overcurrent Protection (51); Figure 3-2 Logic Diagram: Instantaneous Over-Current Element - Siemens 7SR10 Argus Series Manual

Overcurrent relay
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50-n
Enabled
Disabled
AUTORECLOSE
79 P/F Inst Trips
= 50-n
&
79 P/F Prot'n Trip n
= Delayed
Inhibit 50-n
50-n Inrush
L1 81HBL2
Action
Off
Inhibit
L2 81HBL2
L3 81HBL2
50-n Dir Control
Non-Dir
Forward
Reverse
IL1 Fwd
IL1 Rev
IL2 Fwd
IL2 Rev
IL3 Fwd
IL3 Rev
Figure 3-2
3.1.3

Time Delayed Overcurrent Protection (51)

Two time delayed overcurrent elements are provided in the 7SR1002/7SR1003 relay and four elements are
provided in the 7SR1004 relay.
51-n Setting sets the pick-up current level. Where the voltage controlled overcurrent function (51VCO) is used a
multiplier is applied to this setting where the voltage drops below the setting VCO Setting, see Section 3.1.4.
A number of shaped characteristics are provided. An inverse definite minimum time (IDMT) characteristic is
selected from IEC, ANSI or user specific curves using 51-n Char. A time multiplier is applied to the characteristic
curves using the 51-n Time Mult setting. Alternatively, a definite time lag delay (DTL) can be chosen using 51-n
Char. When Definite Time Lag (DTL) is selected the time multiplier is not applied and the 51-n Delay (DTL)
setting is used instead. Operating curve characteristics are illustrated in Chapter 3 – 'Performance Specification'.
The 51-n Reset setting can apply a definite time delayed reset, or when the operation is configured as an IEC or
ANSI or user characteristic if the reset is selected as (IEC/ANSI) DECAYING reset the associated reset curve will
be used. The reset mode is significant where the characteristic has reset before issuing a trip output – see
'Applications Guide'.
A minimum operate time for the characteristic can be set using 51-n Min. Operate Time setting.
A fixed additional operate time can be added to the characteristic using 51-n Follower DTL setting.
Where directional elements are present the direction of operation can be set using 51-n Dir. Control setting.
Directional logic is provided independently for each 51-n element e.g. giving the option of using two elements set
to forward and two to reverse.
©2018 Siemens Protection Devices Limited
&
&
&
L1 Dir En
&
&
L2 Dir En
&
&
L3 Dir En
50/51
Measurement
IL1
IL2
IL3
&
&
&
&
&
&
Logic Diagram: Instantaneous Over-current Element
51-1, 51-2, (51-3 & 51-4 – 7SR1004)
50-n Setting
c
50-n Delay
c
>
c
>
c
>
If directional elements are not
50-n VTS Action
present this block is omitted and all
'Lx Dir En' signals are set TRUE.
Off
Non Dir
Inhibit
&
VT Fail
≥1
≥1
≥1
7SR10 Description of Operation
≥1
General Pickup
≥1
50-n
&
&
≥1
L1 Dir En
&
≥1
L2 Dir En
&
≥1
L3 Dir En
Chapter 1 Page 27 of 77

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