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Appendices
Processor
(Integrated
Components)
Platform Controller
Hub (PCH)
A-22
Item
Stop Grant Configuration
VT-d
CHAP Device
Thermal Device
GMM Device
CRID Support
Above 4GB MMI BIOS assignment
X2APIC Opt Out
eDRAM Mode
Isolate SMBus Segments
PCI Express Configu-
PCI Express Clock Gating
ration
Legacy IO Low Latency
DMI Link ASPM PCH Side
Port8xh Decode
Peer Memory Write Enable
Compliance Test Mode
PCIe-USB Glitch W/A
PCIe function swap
PCI Express Gen3 Eq Lanes
PCI Express Port 0
PCI Express Port 1
PCI Express Port 2
PCI Express Port 3
PCI Express Port 4
PCI Express Port 5
PCI Express Port 6
PCI Express Port 7
SATA And RST Con-
SATA Controller(s)
figuration
SATA Mode Selection
SATA Test Mode
Software Feature Mask Configura-
tion
Aggressive LPM Support
SATA Controller Speed
Serial ATA Port 0
SATA Port
Hot Plug
Spin Up Device
SATA Device Type
Topology
SATA Port 0 DevSlp
DITO Configuration
NY-series Industrial Box PC Hardware User's Manual (W553)
Default / Remark
Auto
Enabled
Disabled
Disabled
Enabled
Disabled
Disabled
Disabled
eDRAM HW Mode
Always
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Every Cm = 6
Every Cp = 2
Override SW EQ Set-
tings = Disabled
Refer to PCI Express
Port on page A-26 for
details.
Enabled
AHCI
Disabled
HDD Unlock = Ena-
bled
LED Locate = Enabled
Disabled
Default
Enabled
Disabled
Disabled
Hard Disk Drive
Unknown
Disabled
Disabled
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