Mitsubishi MELSEC QCPU Programming Manual page 38

Programmable logic controller
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2 INSTRUCTION TABLES
Category
INC
INCP
DINC
DINCP
BIN data
increment
DEC
DECP
DDEC
DDECP
REMARKS
1)
1:The number of steps may vary depending on the device and type of CPU module being
used.
Component
High Performance model QCPU
Process CPU
Basic model QCPU
QnCPU
Note 1:With High Performance module QCPU, (1) requires more number of steps, while it can
process the steps faster, as compared with (2).
Note 2:The number of steps may increase due to the conditions described in Section 3.8.
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Table 2.11 Arithmetic Operation Instructions (Continued)
Symbol
• (D)+1
INC
D
INCP
D
• (D+1, D)+1
DINC
D
DINCP
D
• (D)-1
DEC
D
DECP
D
• (D+1, D)-1
DDEC
D
DDECP
D
(1) When using the following devices only
• Word device : Internal device (except for file register ZR)
• Bit device : Devices whose device Nos. are multiples of 16, whose digit
• Constant : No limitations
(2) When using devices other than (1)
Processing Details
(D)
(D+1, D)
(D)
(D+1, D)
Nomber of basic steps
designation is K8, and which use no index modification.
2
MELSEC-Q/QnA
Execution
Condition
2
6-53
1
6-55
2
6-53
1
6-55
Note 1)
3
Note 2)
2
Note 2)
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