Counter 2-Phase Input Up Or Down (Udcnt2) - Mitsubishi MELSEC QCPU Programming Manual

Programmable logic controller
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6 BASIC INSTRUCTIONS

6.8.2 Counter 2-phase input up or down (UDCNT2)

Internal Devices
Set
(System, User)
Data
Bit
Word
S
(Only X)
D
(Only C)
n
[Instruction Symbol] [Execution Condition]
UDCNT2
[Set Data]
Set Data
S
D
n
[Functions]
(1) The present value of the counter designated by
input designated by
phase pulse).
(2) Direction of the count is determined in the following manner:
• When
added to the present value of the counter).
• When
are subtracted from the present value of the counter).
• No count operation is performed if
(3) Count processing is conducted as described below:
• When the count is going up, the counter contact designated at
value becomes identical with the setting value designated by n.
However, the present value count will continue even when the contact of the counter
designated at
• When the count is going down, the counter for the contact designated at
the present value reaches the setting value minus 1. (See Program Example (1))
• The counter designated at
If it is counting up when the present value is 32767, the present value will become -32768.
Further, if it is counting down when the present value is -32768, the present value will
become 32767.
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MELSECNET/10(H)
File
Direct J \
Register
Bit
: Local devices and the file registers set for individual programs cannot be used.
Command
• Input number for count input:
• Input number for count input:
• Number of counter that will perform count onUDCNT2 instruction
• Set value
(A phase pulse) and the status of the input designated by
S
is ON, if
+1 goes from OFF to ON, count up operation is performed (values are
S
S
is ON, if
+1 goes from ON to OFF, count down operation is performed (values
S
S
goes ON. (See Program Example (1))
D
is a ring counter.
D
QCPU
PLC CPU
Basic
High Performance
Usable Devices
Special
Function
Module
Word
U \G
UDCNT2
S
Meaning
+0 (A phase pulse)
S
+1 (B phase pulse)
S
is updated depending on the status of the
D
is OFF.
S
MELSEC-Q/QnA
QnA
Process CPU
Index
Constant
Register
Other
K, H
Zn
n
D
Data Type
Bit
Word
BIN16
+1 (B
S
goes ON when the present
D
goes OFF when
D
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Q4AR

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