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BITS
BITS
4567
0123
r-"'\
r,..----A- . . . . .
---~"
1100
1101
1110
1111
0000
?
!
=t=RM
0
0001
A
J
/
1
0010
B
K
S
2
0011
C
L
T
3
0100
D
M
U
4
0101
E
N
V
5
0110
F
0
W
6
0111
G
P
X
7
1000
H
Q
y
8
1001
i
R
Z
9
1010
J6
1011
$
,
#
1100
X
*
%
@
1101
c
::J
vWS
:
1110
-
(
;
"-
)
1111
*
GM
l':J.
MC +++ SM r-TM
Figure 5-7.
Modified 1400
System Op Codes
When the micro program reads out the
Op code in EBcnI form, it turns on the 0
and 1 bits of the Cp code.
Next, the
EBCnI character formed in the previous
step is used to address local storage
and remove the new character that is
stored in the G-register.
(In the case
of a blank,
+,
or -, the contents of the
Op code table are ignored and the G-
register is forced to an invalid Cp
code.)
The new character has a bit
configuration that is more readily
tested to tell the type of operation
desired.
To illustrate the use of the
Cp code table, assume that the Op code
read out of the 1400 system program is
an edit Ope
The hexadecimal bit con-
figuration of an E with a WM in EBcnI is
85.
Forcing on the bits 0 and 1 changes
the configuration to CS.
Using CS to
address the Op code table in local stor-
age (Figure 5-8) a 16 is read out and
stored in the G-register.
The 16 is bit
sensitive to the micro program as an
edit Op code.
Any Invalid EBCDI Cp code
configuration addressing the Op code
table brings out a 34 byte that is rec-
ognized by the micro program as an
error.
To assist in understanding the
method used by the 2030 to process 1400
system instructions in compatibility
mode, logic flow charts are included in
Figures 5-9, 5-10, and 5-11 for I-phase
of a 1401 instruction and the execute
phases of a ,",ove operation and an Add
operation.
It should be stressed that
these flow charts are for instructional
use only and may not be exactly the same
as the microprograms they represent.
5-9
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