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IN
I
~
VI
CA
MENMONIC
DESCRIPTION
0
FT
MX TAGS IN
I
TT
1050
TAGS IN
,
3
4
S
5
H
6
FI
MX BUS IN
7
R
8
D
9
L
A
G
,
T
C
V
D
U
E
J
F
I
MNEMONIC
DESCRIPTION
D
f
F REGISTER
EXTERNAL INTR.
I
SfG
SWITCH F and G
,
MC
MACHINE CHECK
REGISTER
3
4
C
INTERVAL TIMER
COUNTER
5
Q
MEMORY PROTECT
REGISTER
6
JI
DIRECT DATA CHANNEL
BUS IN
7
TI
IOSO
BUS IN
B
9
A
B
C
m
SELECTOR CHANNEL
R-REGISTER
D
GS
SELECTOR CHANNEl
STATUS REGISTER
E
GT
SELECTOR CHANNEL
TAGS IN
f
GJ
SELECTOR CHANNEL
GJ ASSEMBLER
CB
MNEMONIC
DESCRIPTION
R
L
D
K
~
IVATED BY
ACT
THE
BEIN
AA BIT
GAONE
MNEMONIC
I
I
I
I
I
MNEMONIC
_STORE WRAP
• RESTORE
WRAP
• WRAP
SHJ
.AC FORCE
O-L1NE
I_LINE
_1_0E
eASCl1
.INTST
O-MC
UV_WX
O-/PL
O _ f
I-FO
CK
DESCRIPTION
DESCRIPTION
GATE SET OF WRAP
BUFFER LATCH
GATE WRAP LATCH
TEST WRAP LATCH
SWITCHES Hand J
FORCE X-REGISTER TO
ZERO ON ALU CARRY
RESET LINE LATCH
(1D50)
SET LINE LATCH
(l050)
FORCE ALU CHECK
CHECK ASCII
LATCH
TEST INTERRUPT
RESET MACHINE CHECK
GATE UV REGISTER
TO WX REGISTER
RESET LOAD LATCH
RESET F REGISTER
SET POSITION 0 OF
F REGISTER
Figure 3-29.
Function Control Mnemonics
ROS CONTROL FIELD MNEMONICS
CD
CF
CG
CV
CC
MNEMONIC
DESCRIPTION
MNEMONIC
DESCRIPTION
MNEMONIC
DESCRIPTION
MNEMONIC
DESCRIPTlO~N
MNEMONIC
DESCRIPTION
Z
Z BUS
0
BLOCK GATE
0
BLOCK GATE
+
ADD
0
BLOCK CARRY
TE
1050 BUS OUT
L
GATE LOW
L
GATE LOW
SUBTRACT
I
INSERT CARRY
JE
DIRECT DATA
H
GATE HIGH
H
GATE HIGH
BINARY
~8&RACT
CHANNEL BUS OUT
!:
AND FUNCTION
Q
MEMORY PROTECT
GATE ALL DATA
GATE ALL DATA
REGISTER
,
DECIMAL
1B~TRACT
n
OR FUNCTION
TA
1050 TAGS OUT
_ STOP
MACHINE STOP
0
C
NO CARRY INSERT
ALLOW CARRY OUT
• H
XL
CROSS LOW
I
C
INSERT CARRY
ALLOW CARRY OUT
S
XH
CROSS HIGH
C
C
CONDITIONAL CARRY IN
ALLOW CARRY OUT
R
X
CROSS
V
EXCLUSIVE
OR
D
L
G
T
V
U
J
I
ALTERNATE CODINGS
~
ACTIVATED BY
THE AK BIT
BEING A ONE
-EXPLAINED IN THE TEXT
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