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a.
Turn on X-control drivers Wr 0-8K
Rd 1 8-16K, and Wr 0-8K Rd 1 8-16
KB (MM232).
Write A (from clock)
(not) M Reg 2 Bit
(not) M Reg 1 Bit
b.
Turn on the X-write current
source (MM252) .
X Source Write
(not) M Reg 2 Bit
c.
Turn on the X decode driver for
the sink end of the X-line.
This
is Wr---OIO (MM302) •
(not) N Reg 5 Bit
N Reg 6 Bit
(not) N Reg 7 Bit
X Wr 0-8K Rd 8-16K Sink
Wr 0-8K Rd 1 8-16KA
d.
Turn on the X decode driver for
the source end of the X-line.
This is Wr 010--- (MM322) •
(not) N Reg 2 Bit
N Reg 3 Bit
13.
14 .
15.
(not) N Reg 4 Bit
X Wr 0-8K Rd 8-16K Source
Wr 0-8K Rd 1 8-16KB
The appropriate set of inhibit drivers
must be gated so that only one set of
these drivers turns on.
For this ad-
dress, Inhibit 0-8KA must be turned
on (MM502).
(not) N Reg 7 Bit
(not) M Reg 1 Bit
(not) M Reg 2 Bit
Inhibit (from clock)
For those bits that are to be set ON,
the inhibit driver must be blocked
from turning on (MM732 through MM772).
The store lines block their respective
inhibit drivers.
For those bits that are to be blocked
from setting, the appropriate inhibit
drivers are turned on by the (not)
store lines.
Inhibit current opposes
the affect of the X-drive current and
the core is not set (MM732 through
MM772) .
2-85
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