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Lastly, OR number 1 is satisfied because
we are not testing to see if we are in
ASCII mode.
The X7 AND is dissatisfied
because OR number
5
is dissatisfied.
We
are testing interrupts, and our assump-
tion was that we had a selector channel
1 interrupt.
RESTORE WRAP-STORE WRAP-WRAP:
An
address overflow, memory wrap, may arise
on a 64K core storage unit.
Additional
circuitry is needed to detect the error
which occurs when there is a carryout of
the high-order
1-
or U-register position
as a result of updating the address.
If the IJ registers are used to
address core, a memory wrap condition
sets the I-wrap latch.
It is sometimes
necessary to remem.ber the status of this
latch.
The mnemonic STORE WRAP will
gate the status of the I-wrap latch to
the wrap-buffer latch.
When it is again necessary to deter-
mine whether there had been a wrap, the
mnemonic RESTORE WRAP will gate the
status of the wrap-buffer latch back
into the I-wrap latch.
The mnemonic WRAP tests the status of
the I-wrap latch, and if this latch is
on a 0, X branch is taken.
If it is
off, the X6 portion of the branch is
still controlled by the CH field.
1 - - OE
I
~ Odd-Even
-
Ctrl. Lotch
Even
A
T2
T1
FL- -
Machine Resetr---
Reset Load
Reset Load
OR
r - -
Machine Reset
r -
A
'-----
A wrapped condition can also occur on
a 8k, 16k, or 32k unit.
This is detect-
ed by testing the high-order positions
of the M-register.
l->OE:
This mnemonic is used in diag-
nostic testing.
The first time this
expression appears, it forces bad parity
by blocking the +L Z bus 0 and +L Z BUS
4 lines.
The next time this expreSSion
is used in the program, it forces an ALU
check by forcing all the minus SUM lines
and the minus carry O-bit line to plus L
levels.
See Figure 3-31.
The odd-even-
control latch is turned on (EVEN) by the
decoding l->CE, T2 and the introduce-
latch set OFF.
A circuit to gate the +L
Z
bus
0
and +L
Z
bus 4 lines requi.res
that the odd-even latch be ODD.
The
introduce-ALU-check latch is turned on
at Tl when the expression l->OE is used
again.
This latch blocks the-L SUM
lines and the -L carry 0 line so that
the lines are all plus and an ALU check
is forced.
The odd-even-control latch
is turned off three ways: machine reset,
rp.set load line, (which is developed
when the mnemonic LOAD O->IPL is used),
or at T2 time when the introduce-ALU-
check latch is on.
STOP:
This mnemonic appears in the CLC
box as STOP or S STOP.
The CF field
coding, 100, causes the stop latch to be
turned on at T4 time, Figure 3-32.
The
output from this latch feeds two
,--- Introduce
Alu Chk Latch
A
-FL - -
r---
f-
OR
T1
T2
T3
T4
T1
T2
T3
T4
I
I
,
I
I
I
I
I
I
I
I
Odd-Even Ctrl Lat
I
I
I
I
I
I
I
I
I
I
I
,
I
I
I
I
Int. Alu Chk Let
I
I
I
I
I
I
I
I
I
I
Figure 3-31.
l->OE Control
3-47
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