Chipset Features Setup - JETWAY J-530BF User Manual

3-3 CHIPSET FEATURES SETUP

This section allows you to configure the system based on the specific features of the
installed chipset.
resources, such as DRAM and the external cache. It also coordinates communications
between the conventional ISA bus and the PCI bus. It must be stated that these items
should never need to be altered. The default settings have been chosen because they
provide the best operating conditions for your system. The only time you might consider
making any changes would be if you discovered that data was being lost while using your
system.
Auto Configuration
Refresh Rate Control
Ref/Act Command Delay
Refresh Queue Depth
RAS Precharge Time
RAS to CAS Delay
ISA Bus clock Frequency
Starting Point of Paging
NA# Enable
L2 Cache Burst RD Cycle
Asyn/Sync Mode CPU/DRAM : Asynchronous
SDRAM CAS Latency
SDRAM WR Retire Rate
DRAM Opt RAS Precharge
PCI Peer Concurrency
Read Prefetch Memory
Assert TRDY After Prefet
CPU to PCI Burst Mem. WR
CPU to PCI Post Write
Linear Mode SRAM Support
DRAM Settings: The first chipset settings deal with CPU access to dynamic random
access memory (DRAM). The default timings have been carefully chosen and should
only be altered if data is being lost. Such a scenario might well occur if your system had
mixed speed DRAM chips installed so that greater delays may be required to preserve the
integrity of the data held in the slower memory chips.
• Auto Configuration: This item allows you select pre-determined optimal values of
chipset parameters. When Disabled, chipset parameters revert to setup information
stored in CMOS. Many fields in this screen are not available when Auto Configuration
is Enabled.
The Choice: Enabled, Disabled.
Note: When this item is enabled, the pre-defined items will become SHOW-ONLY.
• Refresh Rate Control: Select the period required to refresh the DRAMs, according to
DRAM specifications.
This chipset manages bus speeds and access to system memory
ROM PCI/ISA BIOS (2A5IMJ1B)
CHIPSET FEATURES SETUP
AWARD SOFTWARE ,INC
: Enabled
: 15.6us
: 6T
: 12
: 3T
: 3T
: PCICLK/4
: 1T
: Enabled
: Delay 1T
: 3T
: X-1-1-1
: Enabled
: Enabled
: Enabled
: 2QWs
: Enabled
: Enabled
: Disabled
ECC Function Support
AGP Aperture Size
System BIOS Cacheable
Video BIOS Cacheable
Memory Hole at 15M-16M
DRAM Controller 1 T WR
DRAM Controller 1 T RD
PCI Post Write Buffer
PCI Delayed Transaction : Disabled
Auto Detect DIMM/PCI Clk : Enabled
Spread Spectrum
Esc: Quit
F1 : Help
F5 : Old Values
F6 : Load BIOS Defaults
F7 : Load Setup Defaults
Figure 3-4
21
: Enabled
: 64MB
: Enabled
: Enabled
: Disabled
: Enabled
: Enabled
: Disabled
: Disabled
↑↓→←: Select Item
Pu/Pd/+/-:Modify
(Shift)F2 : Color