Rfsoc Device Configuration; Jtag; Quad Spi - Xilinx ZCU111 User Manual

RFSoC Device Configuration

Zynq UltraScale+ XCZU28DR-2E RFSoC devices use a multi-stage boot process as described
in the "Boot and Configuration" chapter of the Zynq UltraScale+ Device Technical Reference
Manual (UG1085)
Table 2-4: Switch SW6 Configuration Option Settings
Boot Mode

JTAG

QSPI32
SD
Notes:
1. Default switch setting.
JTAG
Vivado®, Xilinx SDK, or third-party tools can establish a JTAG connection to the Zynq
UltraScale+ RFSoC device through the FTDI FT4232 USB-to-JTAG/USB UART device (U34)
connected to micro-USB connector (J83).

Quad SPI

To boot from the dual Quad SPI nonvolatile configuration memory:
1. Store a valid Zynq UltraScale+ RFSoC boot image in the Quad SPI flash devices
connected to the MIO Quad SPI interface. See the ZCU111 Restoring Flash Tutorial
XTP515 [Ref 13]
2. Set the boot mode pins SW6 [3:0] PS_MODE[3:0] as indicated in
SPI32.
3. Either power-cycle or press the power-on reset (POR) pushbutton. SW6 is callout 46 in
Figure 2-1.
SD
To boot from an SD card:
1. Store a valid Zynq UltraScale+ RFSoC boot image file on to an SD card (and then plug
the SD card into ZCU111 board socket J100).
2. Set the boot mode pins SW6 [3:0] PS_MODE[3:0] as indicated in
3. Either power-cycle or press the power-on reset (POR) pushbutton. SW6 is callout 46 in
Figure 2-1.
ZCU111 Board User Guide
UG1271 (v1.1) August 6, 2018
[Ref 3]. Switch SW6 configuration option settings are listed in
Mode Pins [3:0]
0000
0010
1110
for information on programming the QSPI.
www.xilinx.com
Chapter 2: Board Setup and Configuration
(1)
Table 2-4.
Mode SW6 [4:1]
ON,ON,ON,ON
ON,ON,OFF,ON
OFF,OFF,OFF,ON
Table 2-4 for Quad
Table 2-4 for SD.
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