Board Power System - Xilinx ZCU111 User Manual

PS_SRST_B Reset
Depressing and then releasing pushbutton SW3 causes net PS_SRST_B to strobe Low. This
reset is used to force a system reset. It can be tied or pulled High, and can be High during
the PS supply power ramps. When the voltage at IN2 is below its threshold or EN2 (P.B.
switch SW3 is pressed) goes Low, OUT2 (PS_SRST_B) goes Low.
Active-Low reset output RST_B asserts when any of the monitored voltages (IN_) falls below
the respective threshold, any EN_ goes Low, or MR is asserted. RST_B remains asserted for
the reset time-out period after all of the monitored voltages exceed their respective
threshold, all EN_ are High, all OUT_ are High, and MR is deasserted. See the Zynq
UltraScale+ Device Technical Reference Manual (UG1085)
resets.

Board Power System

[Figure 2-15, callout 35]
The ZCU111 evaluation board uses power management ICs (PMIC) and power regulators
from Infineon [Ref 25]
schematic 0381811.
Table 3-29: Power System Devices
Ref Des, Controller
PMBus or
ADDR Regulator
IRPS5401_A
IRPS5401_B
U53
(0X43)
IRPS5401_C
IRPS5401_D
IRPS5401_LDO
IRPS5401_A
IRPS5401_B
U55 IRPS5401_C
(0X44)
IRPS5401_D
IRPS5401_LDO
ZCU111 Board User Guide
UG1271 (v1.1) August 6, 2018
to supply the core and auxiliary voltages listed in
Rail Name
VCCINT_IO_BRAM_PS_SDFEC
VCC1V8
VCCINT_RF
Tied to chan. C
N.C.
UTIL_3V3
UTIL_2V5
MGT1V2
Tied to chan. C
MGTRAVCC
www.xilinx.com
Chapter 3: Board Component Descriptions
[Ref 3] for information on the
Max
Voltage INA226
Current
(V) Sensor
(A)
0.85 10 U59
1.8 2 U61
0.85 7 U63
3.3 10.5
2.5 2
1.2 6 U66
0.85 0.5 DVM on R399
Table 3-29. See
INA226 Sense 0381811
PMBus Resistor Schem.
ADDR (Ω) Page
R394:
0x41
0.005
R388:
0x42
0.005
47
R389:
0x49
0.005
R398:
0x47
0.005 49
R399:
0.005
86
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